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"Design and Implementation of an FPGA-Based Data/Timing Formatter."

Yu-Yi Chen et al. (2015)

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DOI: 10.1007/S10836-015-5554-0

access: closed

type: Journal Article

metadata version: 2020-09-11

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  - https://dblp.org/rec/journals/et/ChenHKH15
Yu-Yi Chen, Jiun-Lang Huang, Terry Kuo, Xuan-Lun Huang:
Design and Implementation of an FPGA-Based Data/Timing Formatter. J. Electron. Test. 31(5-6): 549-559 (2015)

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