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"A power and area efficient approximate carry skip adder for error ..."

Sujit Kumar Patel, Bharat Garg, Shireesh Kumar Rai (2020)

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DOI: 10.3906/ELK-1907-72

access: open

type: Journal Article

metadata version: 2021-09-16

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  dblp key:
  - journals/elektrik/PatelGR20
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  - https://dblp.org/rec/journals/elektrik/PatelGR20
Sujit Kumar Patel, Bharat Garg, Shireesh Kumar Rai:
A power and area efficient approximate carry skip adder for error resilient applications. Turkish J. Electr. Eng. Comput. Sci. 28(1): 443-457 (2020)

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