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"A Lock Detector Loop for Low-power PLL-Based Clock and Data Recovery Circuits."

Chua-Chin Wang et al. (2018)

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DOI: 10.1007/S00034-017-0621-7

access: closed

type: Journal Article

metadata version: 2022-04-09

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  - https://dblp.org/rec/journals/cssp/WangHCS18
Chua-Chin Wang, Zong-You Hou, Chih-Lin Chen, Doron Shmilovitz:
A Lock Detector Loop for Low-power PLL-Based Clock and Data Recovery Circuits. Circuits Syst. Signal Process. 37(4): 1692-1703 (2018)

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