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"Printed circuit board assembly time minimisation using a novel Bees Algorithm."

Marco Castellani, Sameh Otri, Duc Truong Pham (2019)

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DOI: 10.1016/J.CIE.2019.05.015

access: closed

type: Journal Article

metadata version: 2020-08-04

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  - https://dblp.org/rec/journals/candie/CastellaniOP19
Marco Castellani, Sameh Otri, Duc Truong Pham:
Printed circuit board assembly time minimisation using a novel Bees Algorithm. Comput. Ind. Eng. 133: 186-194 (2019)

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