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"Design of Low Power Digital Phase Lock Loops."

K. Nagaraj, N. Nayak (2006)

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DOI: 10.1109/SOCC.2006.283909

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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K. Nagaraj, N. Nayak:
Design of Low Power Digital Phase Lock Loops. SoCC 2006: 325-326

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