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"Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip ..."

J. B. Pérez-Ramas et al. (2005)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2009-12-07

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  dblp key:
  - conf/parco/Perez-RamasAPMMH05
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  - https://dblp.org/rec/conf/parco/Perez-RamasAPMMH05
J. B. Pérez-Ramas, David Atienza, Miguel Peón Quirós, Ivan Magan, Jose Manuel Mendias, Román Hermida:
Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs. PARCO 2005: 769-776

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