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"FOSS Compact Model Prototyping with Verilog-A Equation-Defined Devices ..."

Mike Brinson (2019)

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DOI: 10.23919/MIXDES.2019.8787063

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-16

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Mike Brinson:
FOSS Compact Model Prototyping with Verilog-A Equation-Defined Devices (VAEDD). MIXDES 2019: 92-97

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