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"Transistor-Level Fault Analysis and Test Algorithm Development for Ternary ..."

Derek Wright, Manoj Sachdev (2003)

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DOI: 10.1109/TEST.2003.1270823

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/itc/WrightS03
Derek Wright, Manoj Sachdev:
Transistor-Level Fault Analysis and Test Algorithm Development for Ternary Dynamic Content Addressable Memorie. ITC 2003: 39-47

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