default search action

combined dblp search
author search
venue search
publication search

ask others

"An analytical model for a GPU architecture with memory-level and ..."

Sunpyo Hong, Hyesoon Kim (2009)

> Home

Details and statistics

DOI: 10.1145/1555754.1555775

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isca/HongK09
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isca/HongK09
Sunpyo Hong, Hyesoon Kim:
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. ISCA 2009: 152-163

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.