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"Exploring the high-throughput and low-delay hardware design of SM4 on FPGA."

Yixiao Chen et al. (2022)

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DOI: 10.1109/ISOCC56007.2022.10031393

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-22

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  dblp key:
  - conf/isocc/ChenSCCYLLLY22
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  - https://dblp.org/rec/conf/isocc/ChenSCCYLLLY22
Yixiao Chen, Jinfeng Song, Shuai Chen, Yuan Cao, Jing Ye, Huawei Li, Xiaowei Li, Xin Lou, Enyi Yao:
Exploring the high-throughput and low-delay hardware design of SM4 on FPGA. ISOCC 2022: 211-212

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