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"Buffer design and optimization for lut-based structured ASIC design styles."

Po-Yang Hsu et al. (2009)

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DOI: 10.1145/1531542.1531627

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/glvlsi/HsuLCL09
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  - https://dblp.org/rec/conf/glvlsi/HsuLCL09
Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu:
Buffer design and optimization for lut-based structured ASIC design styles. ACM Great Lakes Symposium on VLSI 2009: 377-380

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