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"Power-aware pipelined multiplier design based on 2-dimensional pipeline ..."

Jia Di, Jiann-Shiun Yuan (2003)

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DOI: 10.1145/764808.764826

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-08

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Jia Di, Jiann-Shiun Yuan:
Power-aware pipelined multiplier design based on 2-dimensional pipeline gating. ACM Great Lakes Symposium on VLSI 2003: 64-67

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