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"Efficient Memory Partitioning for Parallel Data Access via Data Reuse."

Jincheng Su et al. (2016)

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DOI: 10.1145/2847263.2847264

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/fpga/SuYZZ16
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  - https://dblp.org/rec/conf/fpga/SuYZZ16
Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou:
Efficient Memory Partitioning for Parallel Data Access via Data Reuse. FPGA 2016: 138-147

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