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"Hardware Description Beyond Register-Transfer Level Languages."

Oron Port, Yoav Etsion (2020)

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DOI: 10.1145/3373087.3375377

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-04

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  dblp key:
  - conf/fpga/PortE20
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  - https://dblp.org/rec/conf/fpga/PortE20
Oron Port, Yoav Etsion:
Hardware Description Beyond Register-Transfer Level Languages. FPGA 2020: 312

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