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"Automatic Verification of Mixed-Level Logic Circuits."

F. Keith Hanna (1998)

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DOI: 10.1007/3-540-49519-3_10

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
  - conf/fmcad/Hanna98
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F. Keith Hanna:
Automatic Verification of Mixed-Level Logic Circuits. FMCAD 1998: 133-166

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