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"Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, ..."

Mohsen Ghasempour et al. (2015)

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DOI: 10.1109/FCCM.2015.47

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/fccm/GhasempourHNPGL15
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  persistent URL:
  - https://dblp.org/rec/conf/fccm/GhasempourHNPGL15
Mohsen Ghasempour, Jonathan Heathcote, Javier Navaridas, Luis A. Plana, Jim D. Garside, Mikel Luján:
Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study. FCCM 2015: 96

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