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"An Efficient Equivalence Checker for Combinational Circuits."

Yusuke Matsunaga (1996)

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DOI: 10.1145/240518.240637

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/dac/Matsunaga96
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  - https://dblp.org/rec/conf/dac/Matsunaga96
Yusuke Matsunaga:
An Efficient Equivalence Checker for Combinational Circuits. DAC 1996: 629-634

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