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"GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural ..."

Hanrui Wang et al. (2020)

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DOI: 10.1109/DAC18072.2020.9218757

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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  dblp key:
  - conf/dac/0002WYSSLH20
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  - https://dblp.org/rec/conf/dac/0002WYSSLH20
Hanrui Wang, Kuan Wang, Jiacheng Yang, Linxiao Shen, Nan Sun, Hae-Seung Lee, Song Han:
GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning. DAC 2020: 1-6

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