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"Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri ..."

Scott Little et al. (2004)

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DOI: 10.1007/978-3-540-30476-0_35

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-01

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  dblp key:
  - conf/atva/LittleWSMY04
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Scott Little, David Walter, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda:
Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. ATVA 2004: 426-440

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