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"Total Power Minimization in Glitch-Free CMOS Circuits Considering Process ..."

Yuanlin Lu, Vishwani D. Agrawal (2008)

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DOI: 10.1109/VLSI.2008.29

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Yuanlin Lu, Vishwani D. Agrawal:
Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation. VLSI Design 2008: 527-532

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