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"FPGA Based High Performance Double-Precision Matrix Multiplication."

Vinay B. Y. Kumar et al. (2009)

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DOI: 10.1109/VLSI.DESIGN.2009.13

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-18

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  - https://dblp.org/rec/conf/vlsid/KumarJPN09
Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan:
FPGA Based High Performance Double-Precision Matrix Multiplication. VLSI Design 2009: 341-346

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