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"An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits."

Jong-Sheng Cherng, Sao-Jie Chen (2003)

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DOI: 10.1109/ICVD.2003.1183117

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/CherngC03
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/CherngC03
Jong-Sheng Cherng, Sao-Jie Chen:
An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits. VLSI Design 2003: 70-

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