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"A 3X-oversampling hybrid clock and data recovery circuit with programmable ..."

Jia-An Jheng, Wei-Sung Chang, Tai-Cheng Lee (2014)

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DOI: 10.1109/VLSI-DAT.2014.6834881

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Jia-An Jheng, Wei-Sung Chang, Tai-Cheng Lee:
A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth. VLSI-DAT 2014: 1-4

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