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Toshimasa Matsuoka
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2020 – today
- 2024
- [j40]Yusaku Hirai, Toshimasa Matsuoka, Takatsugu Kamata, Sadahiro Tani, Takao Onoye:
A Multi-Channel Biomedical Sensor System with System-Level Chopping and Stochastic A/D Conversion. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107(8): 1127-1138 (2024)
2010 – 2019
- 2019
- [j39]Yusaku Hirai
, Toshimasa Matsuoka
A Biomedical Sensor System With Stochastic A/D Conversion and Error Correction by Machine Learning. IEEE Access 7: 21990-22001 (2019) - [j38]Keiji Tatsumi
A Software Level Calibration Based on Bayesian Regression for a Successive Stochastic Approximation Analog-to-Digital Converter System. IEEE Trans. Cybern. 49(4): 1200-1211 (2019) - 2017
- [j37]Sadahiro Tani, Toshimasa Matsuoka
Behavior-Level Analysis of a Successive Stochastic Approximation Analog-to-Digital Conversion System for Multi-Channel Biomedical Data Acquisition. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(10): 2073-2085 (2017) - [c14]Keiji Tatsumi
A calibration with an adaptive data selection based on Bayes estimation for a successive stochastic approximation ADC system. IFSA-SCIS 2017: 1-6 - [c13]Takatsugu Kamata, Masayuki Ueda, Yusaku Hirai, Sadahiro Tani, Tomohiro Asano, Shodai Isami, Toshifumi Kurata, Keiji Tatsumi
An analog front-end employing 87 dB SNDR stochastic SAR-ADC for a biomedical sensor. NEWCAS 2017: 301-304 - 2016
- [j36]Tomohiro Asano, Yusaku Hirai, Sadahiro Tani, Shinya Yano, Ikkyun Jo, Toshimasa Matsuoka
An offset distribution modification technique of stochastic flash ADC. IEICE Electron. Express 13(6): 20160115 (2016) - [j35]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Weimin Wang, Takao Kihara, Toshimasa Matsuoka
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices. IEICE Trans. Electron. 99-C(4): 431-439 (2016) - 2015
- [j34]Saichandrateja Radhapuram, Jung Nam Bae, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A low-power CMOS programmable frequency divider with novel retiming scheme. IEICE Electron. Express 12(6): 20141233 (2015) - [j33]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator. IEICE Trans. Electron. 98-C(12): 1179-1186 (2015) - [j32]Yusaku Hirai, Shinya Yano, Toshimasa Matsuoka:
A Delta-Sigma ADC with Stochastic Quantization. Inf. Media Technol. 10(3): 432-439 (2015) - [j31]Yusaku Hirai, Shinya Yano, Toshimasa Matsuoka
A Delta-Sigma ADC with Stochastic Quantization. IPSJ Trans. Syst. LSI Des. Methodol. 8: 123-130 (2015) - [j30]Ikkyun Jo, Jung Nam Bae, Toshimasa Matsuoka
RF front-end architecture for a triple-band CMOS GPS receiver. Microelectron. J. 46(1): 27-35 (2015) - [c12]Jung Nam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka
A low-voltage design of controller-based ADPLL for implantable biomedical devices. BioCAS 2015: 1-4 - 2014
- [c11]Yusaku Hirai, Kenji Ohara, Toshimasa Matsuoka
Extra loop delay compensation for hybrid delta-sigma modulators. ISCAS 2014: 2353-2356 - 2013
- [j29]Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka
A low-power technique for pipelined ADCs with programmable gain amplification. IEICE Electron. Express 10(1): 20120876 (2013) - [j28]Ikkyun Jo, Jung Nam Bae, Toshimasa Matsuoka
Design of triple-band CMOS GPS receiver RF front-end. IEICE Electron. Express 10(7): 20130126 (2013) - [j27]Yasushi Kishiwada, Hirosuke Iwasaki, Shun Ueda, Yoshiaki Dei, Yusuke Miyawaki, Toshimasa Matsuoka
Low-power wireless on-chip microparticle manipulation with process variation compensation. IEICE Electron. Express 10(13): 20130407 (2013) - 2012
- [j26]Shun Ueda, Yusuke Miyawaki, Jun Wang, Toshimasa Matsuoka
Wireless on-chip microparticle manipulation using pulse-driven dielectrophoresis. IEICE Electron. Express 9(1): 16-22 (2012) - [j25]Daisuke Kanemoto, Yu Tamura, Indika U. K. Bogoda Appuhamylage, Toshimasa Matsuoka
A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators. IEICE Electron. Express 9(6): 572-579 (2012) - 2011
- [j24]Hyunju Ham, Toshimasa Matsuoka
Design of a 500-MS/s stochastic signal detection circuit using a non-linearity reduction technique in a 65-nm CMOS process. IEICE Electron. Express 8(6): 353-359 (2011) - [j23]Hisayasu Sato, Takaya Maruyama, Toshimasa Matsuoka
A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation. IEICE Trans. Electron. 94-C(8): 1311-1319 (2011) - [j22]Takatsugu Kamata, Kazunori Okui, Masahiko Fukasawa, Toshimasa Matsuoka
Low-power zero-IF full-segment ISDB-T CMOS tuner with tenth-order baseband filters. IEEE Trans. Consumer Electron. 57(2): 403-410 (2011) - 2010
- [j21]Bao-Lin Wei, Yu-jie Dai, Jun Wang, Toshimasa Matsuoka
Design of a low-voltage CMOS mixer based on variable load technique. IEICE Electron. Express 7(7): 473-479 (2010) - [j20]Takao Kihara
A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. IEICE Trans. Electron. 93-C(2): 187-199 (2010) - [j19]Toshimasa Matsuoka
Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 356-366 (2010) - [j18]Takatsugu Kamata, Toshimasa Matsuoka
Rf front-end design for CMOS terrestrial wideband TV tuner IC. IEEE Trans. Consumer Electron. 56(3): 1340-1348 (2010)
2000 – 2009
- 2009
- [j17]Fumiaki Yamashita, Toshimasa Matsuoka
Analytical design of a 0.5V 5GHz CMOS LC-VCO. IEICE Electron. Express 6(14): 1025-1031 (2009) - [j16]Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka
A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. IEICE Trans. Electron. 92-C(4): 564-575 (2009) - [j15]Hyunju Ham, Toshimasa Matsuoka
Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1012-1018 (2009) - [c10]Jun Wang, Toshimasa Matsuoka
A 0.5 V feedforward delta-sigma modulator with inverter-based integrator. ESSCIRC 2009: 328-331 - 2008
- [j14]Jun Wang, Toru Ido, Toshimasa Matsuoka
A novel approach to implement summing function for feedforward Δ-Σ AD modulator. IEICE Electron. Express 5(12): 457-463 (2008) - [j13]Jun Wang, Tuck-Yang Lee, Dong-Gyou Kim, Toshimasa Matsuoka
Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources. IEICE Trans. Electron. 91-C(8): 1375-1378 (2008) - [c9]Hyunju Ham, Toshimasa Matsuoka
Sub-threshold signal detection using noise statistics for communications applications. ICECS 2008: 1167-1170 - 2007
- [j12]Takao Kihara, Gue Chol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka
Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(2): 317-325 (2007) - 2006
- [j11]Hideki Shima, Toshimasa Matsuoka
Analytical GMD formulas for mutual inductance calculation of multilevel interconnects. IEICE Electron. Express 3(3): 44-50 (2006) - [j10]Gue Chol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Masaru Goto, Keisuke Ueda, Takao Kihara, Toshimasa Matsuoka
Accurate Small-Signal Modeling of FD-SOI MOSFETs. IEICE Trans. Electron. 89-C(4): 517-519 (2006) - 2005
- [j9]Sungwoo Cha, Yoshiyuki Shimizu, Gue Chol Kim, Toshimasa Matsuoka
A 1-V 120-MHz FD-SOI CMOS linear-in-dB variable gain amplifier. IEICE Electron. Express 2(7): 249-253 (2005) - [j8]Hideki Shima, Toshimasa Matsuoka
Experimental study of integrated tunable transformer. IEICE Electron. Express 2(22): 561-565 (2005) - [j7]Sungwoo Cha, Tetsuya Hirose, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
A CMOS IF Variable Gain Amplifier with Exponential Gain Control. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(2): 410-415 (2005) - [j6]Hideki Shima, Toshimasa Matsuoka
A New Inductance Extraction Technique of On-Wafer Spiral Inductor Based on Analytical Interconnect Formula. IEICE Trans. Electron. 88-C(5): 824-828 (2005) - [j5]Tetsuya Hirose, Toshimasa Matsuoka
Ultralow-Power Current Reference Circuit with Low Temperature Dependence. IEICE Trans. Electron. 88-C(6): 1142-1147 (2005) - [j4]Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka
CMOS Front-End Circuits of Dual-Band GPS Receiver. IEICE Trans. Electron. 88-C(6): 1275-1279 (2005) - [j3]Tsukasa Ida, Shinsaku Shimizu, Toshimasa Matsuoka
Wired CDMA Interface with Adaptivity for Interconnect Capacitances. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2702-2706 (2005) - [c8]Tomoyuki Tanaka, Sungwoo Cha, Shinsaku Shimizu, Tsukasa Ida, Hiroaki Ishihara, Toshimasa Matsuoka
A widely tunable Gm-C filter using tail current offset in two differential pairs. ISCAS (1) 2005: 812-815 - 2004
- [j2]Yoshiyuki Shimizu, Gue Chol Kim, Bunsei Murakami, Keisuke Ueda, Yoshihiro Utsurogi, Sungwoo Cha, Toshimasa Matsuoka
Drain current response delay of FD-SOI MOSFETs in RF operation. IEICE Electron. Express 1(16): 518-522 (2004) - [c7]Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
A dual-band image-reject mixer for GPS with 64dB image rejection. ASP-DAC 2004: 541-542 - 2003
- [j1]Mostafa A. R. Eltokhy, Boon-Keat Tan, Toshimasa Matsuoka, Kenji Taniguchi:
A New Analog Correlator Circuit for DS-CDMA Wireless Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(5): 1294-1301 (2003) - [c6]Shinsaku Shimizu, Toshimasa Matsuoka
Multiple-bit parallel-CDMA technique for an on-chip interface featuring high data transmission rate, small latency and high noise tolerance. ESSCIRC 2003: 639-642 - [c5]Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Parallel bus systems using code-division multiple access technique. ISCAS (2) 2003: 240-243 - 2002
- [c4]Mostafa A. R. Eltokhy, Boon-Keat Tan, Toshimasa Matsuoka
A 3.4-mW 128-MHz analog correlator for DS-CDMA wireless applications. ISCAS (5) 2002: 377-380 - [c3]M. Nakamura, Toshimasa Matsuoka, Kenji Taniguchi:
CMOS phase-shift VCO for short-range wireless communication. ISCAS (4) 2002: 405-408 - [c2]Masaru Takahashi, Boon-Keat Tan, Hiroshi Iwamura, Toshimasa Matsuoka, Kenji Taniguchi:
A study of robustness and coupling-noise immunity on simultaneous data transfer CDMA bus interface. ISCAS (4) 2002: 611-614 - 2001
- [c1]Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi:
A novel dynamically programmable arithmetic array using code division multiple access bus. ICECS 2001: 913-916
Coauthor Index
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