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Mehdi Modarressi
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2020 – today
- 2024
- [j26]Seyyed Hossein Seyyedaghaei Rezaei, Parham Zilouchian Moghaddam, Mehdi Modarressi:
Smart Memory: Deep Learning Acceleration in 3D-Stacked Memories. IEEE Comput. Archit. Lett. 23(1): 137-141 (2024) - [i2]Parham Zilouchian Moghaddam, Mehdi Modarressi, MohammadAmin Sadeghi:
NU-Class Net: A Novel Deep Learning-based Approach for Video Quality Enhancement. CoRR abs/2401.01163 (2024) - 2023
- [c42]Ali Monavari Bidgoli, Sepideh Fattahi, Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab:
NeuroPIM: Felxible Neural Accelerator for Processing-in-Memory Architectures. DDECS 2023: 51-56 - [c41]Ardavan Elahi, Ali Falahati, Farhad Pakdaman, Mehdi Modarressi, Moncef Gabbouj:
NCOD: Near-Optimum Video Compression for Object Detection. ISCAS 2023: 1-5 - 2022
- [j25]Mohammad Sadrosadati, Amirhossein Mirhosseini, Negar Akbarzadeh, Mehdi Modarressi, Hamid Sarbazi-Azad:
Chapter One - Traffic-load-aware virtual channel power-gating in network-on-chips. Adv. Comput. 124: 1-19 (2022) - [j24]Mehdi Modarressi, Seyyed Hossein Seyyedaghaei Rezaei:
Chapter Seven - Power-efficient network-on-chip design by partial topology reconfiguration. Adv. Comput. 124: 217-255 (2022) - [j23]Azam Ghanbari, Mehdi Modarressi:
Energy-efficient acceleration of convolutional neural networks using computation reuse. J. Syst. Archit. 126: 102490 (2022) - [j22]Arash Firuzan, Mehdi Modarressi, Midia Reshadi, Ahmad Khademzadeh:
Reconfigurable Network-on-Chip based Convolutional Neural Network Accelerator. J. Syst. Archit. 129: 102567 (2022) - [c40]Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar:
Multi-Precision Deep Neural Network Acceleration on FPGAs. ASP-DAC 2022: 454-459 - 2021
- [c39]Bita Dabiri, Mehdi Modarressi, Masoud Daneshtalab:
Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design. DSD 2021: 143-149 - [c38]Vahid Geraeinejad, Sima Sinaei, Mehdi Modarressi, Masoud Daneshtalab:
RoCo-NAS: Robust and Compact Neural Architecture Search. IJCNN 2021: 1-8 - 2020
- [j21]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Rachata Ausavarungnirun, Mohammad Sadrosadati, Onur Mutlu, Masoud Daneshtalab:
NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories. IEEE Comput. Archit. Lett. 19(1): 80-83 (2020) - [j20]Hoda Mahdiani, Alireza Khadem, Azam Ghanbari, Mehdi Modarressi, Farima Fattahi-Bayat, Masoud Daneshtalab:
ΔNN: Power-Efficient Neural Network Acceleration Using Differential Weights. IEEE Micro 40(1): 67-74 (2020) - [i1]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Rachata Ausavarungnirun, Mohammad Sadrosadati, Onur Mutlu, Masoud Daneshtalab:
NOM: Network-On-Memory for Inter-Bank Data Transfer in Highly-Banked Memories. CoRR abs/2004.09923 (2020)
2010 – 2019
- 2018
- [j19]Mehdi Modarressi, Hamid Sarbazi-Azad:
Chapter Six - Topology Specialization for Networks-on-Chip in the Dark Silicon Era. Adv. Comput. 110: 217-258 (2018) - [j18]Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Abbas Mazloumi, Farid Samandi, Mahmood Naderan-Tahan, Mehdi Modarressi, Hamid Sarbazi-Azad:
Fast Data Delivery for Many-Core Processors. IEEE Trans. Computers 67(10): 1416-1429 (2018) - [j17]Amirhossein Mirhosseini, Mohammad Sadrosadati, Fatemeh Aghamohammadi, Mehdi Modarressi, Hamid Sarbazi-Azad:
BARAN: Bimodal Adaptive Reconfigurable-Allocator Network-on-Chip. ACM Trans. Parallel Comput. 5(3): 11:1-11:29 (2018) - [c37]Nasrin Akbari, Mehdi Modarressi, Masoud Daneshtalab, Mohammad Loni:
A Customized Processing-in-Memory Architecture for Biological Sequence Alignment. ASAP 2018: 1-8 - [c36]Atefesadat Seyedolhosseini, Nasser Masoumi, Mehdi Modarressi, Noushin Karimian:
Zone Based Control Methodology of Smart Indoor Lighting Systems Using Feedforward Neural Networks. IST 2018: 201-206 - [c35]Atefesadat Seyedolhosseini, Nasser Masoumi, Mehdi Modarressi, Noushin Karimian:
Design and Implementation of Efficient Smart Lighting Control System with Learning Capability for Dynamic Indoor Applications. IST 2018: 241-246 - [c34]Arash Firuzan, Mehdi Modarressi, Masoud Daneshtalab, Midia Reshadi:
Reconfigurable Network-on-Chip for 3D Neural Network Accelerators. NOCS 2018: 18:1-18:8 - 2017
- [j16]Ali Yasoubi, Reza Hojabr, Mehdi Modarressi:
Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse. IEEE Comput. Archit. Lett. 16(1): 72-75 (2017) - [j15]Mahsa Keramati, Mehdi Modarressi, Seyed Hossein Seyedahaei Rezaei:
Thermal management in 3d networks-on-chip using dynamic link sharing. Microprocess. Microsystems 52: 69-79 (2017) - [j14]Reza Hojabr, Mehdi Modarressi, Masoud Daneshtalab, Ali Yasoubi, Ahmad Khonsari:
Customizing Clos Network-on-Chip for Neural Networks. IEEE Trans. Computers 66(11): 1865-1877 (2017) - [c33]Elham Momenzadeh, Mehdi Modarressi, Abbas Mazloumi, Masoud Daneshtalab:
Parallel Forwarding for Efficient Bandwidth Utilization in Networks-on-Chip. ARCS 2017: 152-163 - [c32]Nasrin Akbari, Mehdi Modarressi:
A High-Performance Network-on-Chip Topology for Neuromorphic Architectures. CSE/EUC (2) 2017: 9-16 - [c31]Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad:
Near-Ideal Networks-on-Chip for Servers. HPCA 2017: 277-288 - 2016
- [j13]Seyyed Hossein Seyyedaghaei Rezaei, Abbas Mazloumi, Mehdi Modarressi, Pejman Lotfi-Kamran:
Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip. IEEE Comput. Archit. Lett. 15(1): 5-8 (2016) - [j12]Pooyan Mehrvarzy, Mehdi Modarressi, Hamid Sarbazi-Azad:
Power- and performance-efficient cluster-based network-on-chip with reconfigurable topology. Microprocess. Microsystems 46: 122-135 (2016) - [j11]Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad:
An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors. IEEE Trans. Computers 65(5): 1656-1662 (2016) - [c30]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Reza Yazdani Aminabadi, Masoud Daneshtalab:
Fault-tolerant 3-D network-on-chip design using dynamic link sharing. DATE 2016: 1195-1200 - [c29]Mehdi Modarressi, Ali Yasoubi, Maryam Modarressi:
Low-Power Online ECG Analysis Using Neural Networks. DSD 2016: 547-552 - [c28]Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab, Shervin Roshanisefat:
A Three-Dimensional Networks-on-Chip Architecture with Dynamic Buffer Sharing. PDP 2016: 771-776 - [c27]Amin Rezaei, Masoud Daneshtalab, Dan Zhao, Mehdi Modarressi:
SAMi: Self-aware migration approach for congestion reduction in NoC-based MCSoC. SoCC 2016: 145-150 - 2015
- [j10]Mehdi Modarressi, Nasibeh Teimouri, Hamid Sarbazi-Azad:
Improving the performance of packet-switched networks-on-chip by SDM-based adaptive shortcut paths. Integr. 50: 193-204 (2015) - [j9]Farhad Pakdaman, Abbas Mazloumi, Mehdi Modarressi:
Integrated circuit-packet switching NoC with efficient circuit setup mechanism. J. Supercomput. 71(8): 2787-2807 (2015) - [j8]Mehdi Modarressi, Hamid Sarbazi-Azad:
Leveraging dark silicon to optimize networks-on-chip topology. J. Supercomput. 71(9): 3549-3566 (2015) - [c26]Abbas Mazloumi, Mehdi Modarressi:
A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors. DATE 2015: 908-911 - [c25]Amirhossein Mirhosseini, Mohammad Sadrosadati, Ali Fakhrzadehgan, Mehdi Modarressi, Hamid Sarbazi-Azad:
An energy-efficient virtual channel power-gating mechanism for on-chip networks. DATE 2015: 1527-1532 - [c24]Mohsen Faryabi, Hamed Dorosti, Mehdi Modarressi, Sied Mehdi Fakhraie:
Process variation-aware approximation for efficient timing management of digital circuits. EWDTS 2015: 1-4 - [c23]Mehdi Modarressi, Faezeh Faghih, Maryam Modarressi:
Hardware accelerator for biological protein sequence alignment on reconfigurable Networks-on-Chip. EWDTS 2015: 1-4 - [c22]Ali Yasoubi, Reza Hojabr, Hengameh Takshi, Mehdi Modarressi, Masoud Daneshtalab:
CuPAN - High Throughput On-chip Interconnection for Neural Networks. ICONIP (3) 2015: 559-566 - [c21]Arash Firuzan, Mehdi Modarressi, Masoud Daneshtalab:
Reconfigurable communication fabric for efficient implementation of neural networks. ReCoSoC 2015: 1-8 - 2014
- [c20]Mehdi Modarressi, Hamid Sarbazi-Azad:
A reconfigurable network-on-chip architecture for heterogeneous CMPs in the dark-silicon era. ASAP 2014: 76-77 - 2013
- [j7]Mehdi Modarressi, Marjan Asadinia, Hamid Sarbazi-Azad:
Using task migration to improve non-contiguous processor allocation in NoC-based CMPs. J. Syst. Archit. 59(7): 468-481 (2013) - [j6]Masoud Daneshtalab, Pasi Liljeberg, Mehdi Modarressi, Leandro Soares Indrusiak:
Special issue on network-based many-core embedded systems. J. Syst. Archit. 59(9): 691-692 (2013) - [c19]Nasibeh Teimouri, Mehdi Modarressi, Hamid Sarbazi-Azad:
Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip. PDP 2013: 509-513 - 2012
- [j5]Marjan Asadinia, Mehdi Modarressi, Hamid Sarbazi-Azad:
Supporting non-contiguous processor allocation in mesh-based chip multiprocessors using virtual point-to-point links. IET Comput. Digit. Tech. 6(5): 302-317 (2012) - [j4]Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad:
The 2D digraph-based NoCs: attractive alternatives to the 2D mesh NoCs. J. Supercomput. 59(1): 1-21 (2012) - [c18]Mehdi Modarressi, Hamid Sarbazi-Azad:
Reconfigurable Cluster-Based Networks-on-Chip for Application-Specific MPSoCs. ASAP 2012: 153-156 - [c17]Yashar Asgarieh, Mohammad Hassan Khabbazian, Mehdi Modarressi, Hamid Sarbazi-Azad:
A Game Theoretical Thermal - Aware Run - Time Task Synchronization Method for Multiprocessor Systems - on - Chip. DSD 2012: 759-765 - 2011
- [j3]Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad:
Application-Aware Topology Reconfiguration for On-Chip Networks. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 2010-2022 (2011) - [c16]Nasibeh Teimouri, Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad:
Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths. ARCS 2011: 231-242 - [c15]Marjan Asadinia, Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad:
Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links. DATE 2011: 413-418 - [c14]Reyhaneh Jabbarvand Behrouz, Mehdi Modarressi, Hamid Sarbazi-Azad:
A reconfigurable fault-tolerant routing algorithm to optimize the network-on-chip performance and latency in presence of intermittent and permanent faults. ICCD 2011: 433-434 - [c13]Mehdi Modarressi, Seyed Hossein Nikounia, Amir Hossein Jahangir:
Low-power arithmetic unit for DSP applications. SoC 2011: 68-71 - [c12]Hossein Yaghoubi, Mehdi Modarressi, Hamid Sarbazi-Azad:
A Distributed Task Migration Scheme for Mesh-Based Chip-Multiprocessors. PDCAT 2011: 24-29 - 2010
- [j2]Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad:
The 2D SEM: A novel high-performance and low-power mesh-based topology for networks-on-chip. Int. J. Parallel Emergent Distributed Syst. 25(4): 331-344 (2010) - [j1]Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad:
Virtual Point-to-Point Connections for NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(6): 855-868 (2010) - [c11]Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol:
An efficient dynamically reconfigurable on-chip network architecture. DAC 2010: 166-169
2000 – 2009
- 2009
- [c10]Mehdi Modarressi, Hamid Sarbazi-Azad, Mohammad Arjomand:
A hybrid packet-circuit switched on-chip network based on SDM. DATE 2009: 566-569 - [c9]Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol:
Performance and power efficient on-chip communication using adaptive virtual point-to-point connections. NOCS 2009: 203-212 - 2008
- [c8]Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad:
The 2D DBM: An attractive alternative to the simple 2D mesh topology for on-chip networks. ICCD 2008: 486-490 - [c7]Reza Sabbaghi-Nadooshan, Mehdi Modarressi, Hamid Sarbazi-Azad:
A novel high-performance and low-power mesh-based NoC. IPDPS 2008: 1-7 - [c6]Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol:
Virtual Point-to-Point Links in Packet-Switched NoCs. ISVLSI 2008: 433-436 - 2007
- [c5]Mehdi Modarressi, Hamid Sarbazi-Azad:
Power-aware mapping for reconfigurable NoC architectures. ICCD 2007: 417-422 - 2006
- [c4]Mehdi Modarressi, Shaahin Hessabi, Maziar Goudarzi:
A Reconfigurable Cache Architecture for Object-Oriented Embedded Systems. CCECE 2006: 959-962 - [c3]Mehdi Modarressi, Shaahin Hessabi, Maziar Goudarzi:
A Data Prefetching Mechanism for Object-Oriented Embedded Systems Using Run-Time Profiling. DELTA 2006: 249-254 - [c2]Shaahin Hessabi, Mehdi Modarressi, Maziar Goudarzi, Hani JavanHemmat:
A Table-Based Application-Specific Prefetch Engine for Object-Oriented Embedded Systems. ICSAMOS 2006: 7-13 - 2005
- [c1]Mehdi Modarressi, Maziar Goudarzi, Shaahin Hessabi:
Application-Specific Hardware-Driven Prefetching to Improve Data Cache Performance. Asia-Pacific Computer Systems Architecture Conference 2005: 761-774
Coauthor Index
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last updated on 2024-08-05 20:19 CEST by the dblp team
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