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Kazuyuki Tateishi

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2000 – 2009

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2005
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Yukiko Kubo, Hiroshi Miyashita, Yoji Kajitani, Kazuyuki Tateishi:
Equidistance routing in high-speed VLSI layout design. Integr. 38(3): 439-449 (2005)
2004
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Yukiko Kubo, Hiroshi Miyashita, Yoji Kajitani, Kazuyuki Tateishi:
Equidistance routing in high-speed VLSI layout design. ACM Great Lakes Symposium on VLSI 2004: 220-223

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