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2020 – today
- 2024
- [j39]Gianpiero Cabodi
, Paolo E. Camurati
Improving Bounded Model Checking Exploiting Interpolation-Based Learning and Strengthening. IEEE Access 12: 119341-119349 (2024) - [j38]Gianpiero Cabodi
Hardware Model Checking Algorithms and Techniques. Algorithms 17(6): 253 (2024) - [j37]Gianpiero Cabodi
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3083-3087 (2024) - 2022
- [j36]Gianpiero Cabodi, Paolo E. Camurati, Marco Palena
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking. Formal Methods Syst. Des. 60(2): 117-146 (2022) - 2021
- [c62]Gianpiero Cabodi, Paolo E. Camurati, Alexey Ignatiev
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification. DATE 2021: 1122-1125 - 2020
- [j35]Gianpiero Cabodi
Reducing Interpolant Circuit Size Through SAT-Based Weakening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(7): 1524-1531 (2020)
2010 – 2019
- 2019
- [j34]Gianpiero Cabodi
Logic Synthesis for Interpolant Circuit Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(2): 380-384 (2019) - [c61]Gianpiero Cabodi, Paolo Camurati, Fabrizio F. Finocchiaro, Danilo Vendraminetto
Model Checking Speculation-Dependent Security Properties: Abstracting and Reducing Processor Models for Sound and Complete Verification. C2SI 2019: 462-479 - [c60]Edoardo Fadda
KPIs for Optimal Location of charging stations for Electric Vehicles: the Biella case-study. FedCSIS 2019: 123-126 - 2018
- [j33]Gianpiero Cabodi, Paolo Camurati, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer
To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking. Int. J. Softw. Tools Technol. Transf. 20(3): 313-325 (2018) - 2017
- [j32]Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro
Embedded Systems Secure Path Verification at the Hardware/Software Interface. IEEE Des. Test 34(5): 38-46 (2017) - [j31]Syed Tahir Hussain Rizvi
Deep Classifiers-Based License Plate Detection, Localization and Recognition on GPU-Powered Mobile Platform. Future Internet 9(4): 66 (2017) - [j30]Gianpiero Cabodi, Paolo Camurati, Alan Mishchenko, Marco Palena
SAT solver management strategies in IC3: an experimental approach. Formal Methods Syst. Des. 50(1): 39-74 (2017) - [j29]Gianpiero Cabodi, Alessandro Garbo, Carmelo Loiacono, Stefano Quer
Efficient Complex High-Precision Computations on GPUs without Precision Loss. J. Circuits Syst. Comput. 26(12): 1750187:1-1750187:38 (2017) - [c59]Syed Tahir Hussain Rizvi, Gianpiero Cabodi, Gianluca Francini:
GPU-only unified ConvMM layer for neural classifiers. CoDIT 2017: 539-543 - [c58]Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper). SEFM 2017: 382-387 - 2016
- [j28]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
A graph-labeling approach for efficient cone-of-influence computation in model-checking problems with multiple properties. Softw. Pract. Exp. 46(4): 493-511 (2016) - [c57]Syed Tahir Hussain Rizvi, Gianpiero Cabodi, Pedro P. B. de Gusmao, Gianluca Francini:
Gabor filter based image representation for object classification. CoDIT 2016: 628-632 - [c56]Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem. CPM 2016: 11:1-11:8 - [c55]Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening. FMCAD 2016: 25-32 - [c54]Luca Sterpone
Scalable FPGA graph model to detect routing faults. IOLTS 2016: 155-160 - [c53]Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Danilo Vendraminetto
Secure Path Verification. IVSW 2016: 1-6 - [i2]Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer:
A Greedy Approach to Answer Reachability Queries on DAGs. CoRR abs/1611.02506 (2016) - 2015
- [j27]Gianpiero Cabodi, Carmelo Loiacono, Danilo Vendraminetto
Optimization techniques for craig interpolant compaction in unbounded model checking. Formal Methods Syst. Des. 46(2): 135-162 (2015) - 2014
- [j26]Gianpiero Cabodi, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer, Danilo Vendraminetto, Armin Biere, Keijo Heljanko:
Hardware Model Checking Competition 2014: An Analysis and Comparison of Solvers and Benchmarks. J. Satisf. Boolean Model. Comput. 9(1): 135-172 (2014) - [c52]Gianpiero Cabodi, Paolo Pasini, Stefano Quer, Danilo Vendraminetto:
Tightening BDD-based approximate reachability with SAT-based clause generalization∗. DATE 2014: 1-6 - [c51]Gianpiero Cabodi, Marco Palena, Paolo Pasini:
Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking. FMCAD 2014: 43-50 - 2013
- [j25]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Thread-based multi-engine model checking for multicore platforms. ACM Trans. Design Autom. Electr. Syst. 18(3): 36:1-36:28 (2013) - [c50]Gianpiero Cabodi, Carmelo Loiacono, Danilo Vendraminetto:
Optimization techniques for craig interpolant compaction in unbounded model checking. DATE 2013: 1417-1422 - [c49]Marco Palena, Gianpiero Cabodi, Alan Mishchenko:
Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3. DIFTS@FMCAD 2013 - 2012
- [e1]Gianpiero Cabodi, Satnam Singh:
Formal Methods in Computer-Aided Design, FMCAD 2012, Cambridge, UK, October 22-25, 2012. IEEE 2012, ISBN 978-1-4673-4832-4 [contents] - 2011
- [j24]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Benchmarking a model checker for algorithmic improvements and tuning for performance. Formal Methods Syst. Des. 39(2): 205-227 (2011) - [c48]Gianpiero Cabodi, Sergio Nocco, Stefano Quer:
Interpolation sequences revisited. DATE 2011: 316-322 - [c47]Gianpiero Cabodi, Sergio Nocco:
Optimized model checking of multiple properties. DATE 2011: 543-546 - 2010
- [j23]Gianpiero Cabodi, Leandro Dipietro, Marco Murciano, Sergio Nocco:
Finding Multiple Equivalence-Preserving Transformations in Combinational Circuits through Incremental-SAT. J. Electron. Test. 26(2): 261-278 (2010) - [j22]Gianpiero Cabodi, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Partitioning Interpolant-Based Verification for Effective Unbounded Model Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(3): 382-395 (2010) - [j21]Gianpiero Cabodi, Marco Murciano, Massimo Violante:
Boosting software fault injection for dependability analysis of real-time embedded applications. ACM Trans. Embed. Comput. Syst. 10(2): 24:1-24:32 (2010) - [j20]Gianpiero Cabodi, Luciano Lavagno, Marco Murciano, Alex Kondratyev, Yosinori Watanabe:
Speeding-up heuristic allocation, scheduling and binding with SAT-based abstraction/refinement techniques. ACM Trans. Design Autom. Electr. Syst. 15(2): 12:1-12:34 (2010)
2000 – 2009
- 2009
- [j19]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Strengthening Model Checking Techniques With Inductive Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 154-158 (2009) - [c46]Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Speeding up model checking by exploiting explicit and hidden verification constraints. DATE 2009: 1686-1691 - [c45]Gianpiero Cabodi, Leandro Dipietro, Marco Murciano, Sergio Nocco:
Exploiting incrementality in SAT-based search for multiple equivalence-preserving transformations in combinational circuits. HLDVT 2009: 46-53 - 2008
- [j18]Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
Boosting interpolation with dynamic localized abstraction and redundancy removal. ACM Trans. Design Autom. Electr. Syst. 13(1): 3:1-3:20 (2008) - [c44]Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking. FMCAD 2008: 1-8 - [c43]Gianpiero Cabodi, Paolo Camurati, Marco Murciano:
Automated abstraction by incremental refinement in interpolant-based model checking. ICCAD 2008: 129-136 - 2007
- [c42]Gianpiero Cabodi, Sergio Nocco, Stefano Quer:
Boosting the role of inductive invariants in model checking. DATE 2007: 1319-1324 - [c41]Gabriel P. Bischoff, Karl S. Brace, Gianpiero Cabodi:
A Compositional Approach for Equivalence Checking of Sequential Circuits with Unknown Reset State and Overlapping Partitions. EUROCAST 2007: 505-514 - 2006
- [c40]Gianpiero Cabodi, Marco Murciano, Sergio Nocco, Stefano Quer
Stepping forward with interpolants in unbounded model checking. ICCAD 2006: 772-778 - [c39]Gianpiero Cabodi, Marco Murciano:
BDD-Based Hardware Verification. SFM 2006: 78-107 - 2005
- [j17]Gianpiero Cabodi, Alex Kondratyev, Luciano Lavagno, Sergio Nocco, Stefano Quer
A BMC-based formulation for the scheduling problem of hardware systems. Int. J. Softw. Tools Technol. Transf. 7(2): 102-117 (2005) - [j16]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Are BDDs still alive within sequential verification? Int. J. Softw. Tools Technol. Transf. 7(2): 129-142 (2005) - [c38]Gianpiero Cabodi, Marco Crivellari, Sergio Nocco, Stefano Quer
Circuit Based Quantification: Back to State Set Manipulation within Unbounded Model Checking. DATE 2005: 688-689 - 2004
- [j15]Gianpiero Cabodi, Sergio Nocco, Stefano Quer:
Improving SAT-based Bounded Model Checking by Means of BDD-based Approximate Traversals. J. Univers. Comput. Sci. 10(12): 1696-1730 (2004) - [c37]Gabriel P. Bischoff, Karl S. Brace, Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Exploiting Target Enlargement and Dynamic Abstraction within Mixed BDD and SAT Invariant Checking. BMC@CAV 2004: 33-49 - 2003
- [c36]Gianpiero Cabodi, Sergio Nocco, Stefano Quer:
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals. DATE 2003: 10898-10905 - [c35]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
A BMC-formulation for the scheduling problem in highly constrained hardware Systems. BMC@CAV 2003: 623-638 - 2002
- [c34]Gianpiero Cabodi, Sergio Nocco, Stefano Quer
Mixing Forward and Backward Traversals in Guided-Prioritized BDD-Based Verification. CAV 2002: 471-484 - [c33]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Can BDDs compete with SAT solvers on bounded model checking? DAC 2002: 117-122 - [c32]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Dynamic Scheduling and Clustering in Symbolic Image Computation. DATE 2002: 150-156 - [c31]Luciano Lavagno, Mihai T. Lazarescu
A Symbolic Approach for the Combined Solution of Scheduling and Allocation. ISSS 2002: 237-242 - 2001
- [j14]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Reachability analysis of large circuits using disjunctive partitioning and partial iterative squaring. J. Syst. Archit. 47(2): 163-179 (2001) - [c30]Gianpiero Cabodi:
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions. CAV 2001: 118-130 - [c29]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Biasing symbolic search by means of dynamic activity profiles. DATE 2001: 9-15 - 2000
- [j13]Stefano Quer
Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. Formal Methods Syst. Des. 17(2): 107-134 (2000) - [j12]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Symbolic forward/backward traversals of large finite state machines. J. Syst. Archit. 46(12): 1137-1158 (2000) - [j11]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving symbolic reachability analysis by means of activityprofiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(9): 1065-1075 (2000) - [c28]Gianpiero Cabodi, Stefano Quer
Optimizing sequential verification by retiming transformations. DAC 2000: 601-606
1990 – 1999
- 1999
- [j10]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving the efficiency of BDD-based operators by means of partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(5): 545-556 (1999) - [c27]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Improving Symbolic Traversals by Means of Activity Profiles. DAC 1999: 306-311 - [c26]Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer
Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE 1999: 8-12 - 1998
- [j9]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno
The General Product Machine: a New Model for Symbolic FSM Traversal. Formal Methods Syst. Des. 12(3): 267-289 (1998) - [j8]Gianpiero Cabodi, Stefano Quer, Paolo Camurati:
Memory Optimization in Function and Set Manipulation with BDDs. Softw. Pract. Exp. 28(1): 99-120 (1998) - [j7]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Auxiliary variables for BDD-based representation and manipulation of Boolean functions. ACM Trans. Design Autom. Electr. Syst. 3(3): 309-340 (1998) - [i1]Gianpiero Cabodi, Stefano Quer, Christoph Meinel, Harald Sack, Anna Slobodová, Christian Stangier:
Binary Decision Diagrams and the Multiple Variable Order Problem. Universität Trier, Mathematik/Informatik, Forschungsbericht 98-22 (1998) - 1997
- [j6]Gianpiero Cabodi, Paolo Camurati:
Symbolic FSM traversals based on the transition relation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(5): 448-457 (1997) - [c25]Gianpiero Cabodi, Paolo Camurati, Antonio Lioy, Massimo Poncino, Stefano Quer:
A parallel approach to symbolic traversal based on set partitioning. CHARME 1997: 167-184 - [c24]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer:
Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. DAC 1997: 728-733 - [c23]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
Verification and synthesis of counters based on symbolic techniques. ED&TC 1997: 176-181 - 1996
- [c22]Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer, Robert K. Brayton, Ellen Sentovich:
Incremental re-encoding for symbolic traversal of product machines. EURO-DAC 1996: 158-163 - [c21]Stefano Quer, Gianpiero Cabodi, Paolo Camurati:
Decomposed symbolic forward traversals of large finite state machines. EURO-DAC 1996: 170-175 - [c20]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Improved reachability analysis of large finite state machines. ICCAD 1996: 354-360 - [c19]Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich:
Enhancing FSM Traversal by Temporary Re-Encoding. ICCD 1996: 6-11 - 1995
- [c18]Gianpiero Cabodi, Stefano Quer
Transforming boolean relations by symbolic encoding. CHARME 1995: 161-170 - [c17]Gianpiero Cabodi, Stefano Quer, Paolo Camurati:
Computing subsets of equivalence classes for large FSMs. EURO-DAC 1995: 288-293 - 1994
- [c16]Gianpiero Cabodi, Paolo Camurati, Stefano Quer
Auxiliary Variables for Extending Symbolic Traversal Techniques to Data Paths. DAC 1994: 289-293 - [c15]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Symbolic exploration of large circuits with enhanced forward/backward traversals. EURO-DAC 1994: 22-27 - [c14]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Symbolic traversals of data paths with auxiliary variables. Great Lakes Symposium on VLSI 1994: 93-96 - [c13]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Efficient State Space Pruning in Symbolic Backward Traversal. ICCD 1994: 230-235 - [c12]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Detecting hard faults with combined approximate forward/backward symbolic techniques. ISCAS 1994: 299-302 - [c11]Gianpiero Cabodi, Paolo Camurati, Stefano Quer:
Full-Symbolic ATPG for Large Circuits. ITC 1994: 980-988 - [c10]Gianpiero Cabodi, Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
A BDD Package For A Massively Parallel SIMD Architecture. PDP 1994: 212-219 - 1993
- [j5]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
An approach to sequential circuit diagnosis based on formal verification techniques. J. Electron. Test. 4(1): 11-17 (1993) - [j4]Gianpiero Balboni, Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
A Parallel System for Test Pattern Generation. Parallel Comput. 19(2): 177-185 (1993) - [c9]Gianpiero Cabodi, Paolo Camurati:
Advancements in Symbolic Traversal Technique. CHARME 1993: 155-166 - [c8]Gianpiero Cabodi, Paolo Camurati:
Exploiting Cofactoring for Efficient FSM Symbolic Traversal Based on the Transition Relation. ICCD 1993: 299-303 - 1992
- [c7]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda:
A New Model for Improving symbolic Product Machine Traversal. DAC 1992: 614-619 - [c6]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
Cross-fertilizing FSM verification techniques and sequential diagnosis. EURO-DAC 1992: 306-311 - [c5]Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
Sequential Circuit Diagnosis Based on Formal Verification Techniques. ITC 1992: 187-196 - 1991
- [j3]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
TPDL: Extended Temporal Profile Description Language. Softw. Pract. Exp. 21(4): 355-374 (1991) - [c4]Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
Fast Differential Fault Simulation by Dynamic Fault Ordering. ICCD 1991: 60-63 - [c3]Gianpiero Balboni, Gianpiero Cabodi, Silvano Gai, D. Sismondi, Matteo Sonza Reorda
A parallel system for test pattern generation. SPDP 1991: 708-715 - 1990
- [j2]Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
A transputer-based gate-level fault simulator. Microprocessing and Microprogramming 30(1-5): 529-534 (1990)
1980 – 1989
- 1989
- [j1]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
Expressing logical and temporal conditions in simulation environments: TPDL*. Microprocessing and Microprogramming 26(4): 241-252 (1989) - 1988
- [c2]Gianpiero Cabodi, Silvano Gai, Marco Mezzalama, Pier Luca Montessoro, Fabio Somenzi:
Fault simulation in a multilevel environment: the MOZART approach. FTCS 1988: 128-133 - 1986
- [c1]Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto:
Experiences in Prolog-Based DFT Rule Checking. FJCC 1986: 909-914
Coauthor Index
Paolo Camurati
aka: Paolo E. Camurati
aka: Paolo E. Camurati
[j39] [j38] [j37] [j36] [c62] [j35] [j34] [c61] [c60] [j33] [j32] [j30] [c58] [j28] [c56] [c55] [c53] [i2] [c46] [c44] [c43] [c33] [c32] [j14] [c29] [j13] [j12] [j11] [j10] [c27] [c26] [j9] [j8] [j7] [j6] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11] [j5] [c9] [c8] [c7] [c6] [c5] [j3] [j1] [c1]
[j33] [j29] [j28] [c56] [i2] [j26] [c52] [j25] [j24] [c48] [j22] [j19] [c46] [j18] [c44] [c42] [c40] [j17] [j16] [c38] [j15] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [j14] [c29] [j13] [j12] [j11] [c28] [j10] [c27] [c26] [j8] [j7] [i1] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [c11]
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