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Moo-Kyoung Chung
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2010 – 2019
- 2014
- [j4]Changmoo Kim, Moo-Kyoung Chung, Yeon-Gon Cho, Mario Konijnenburg, Soojung Ryu, Jeongwook Kim:
ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications. ACM Trans. Reconfigurable Technol. Syst. 7(3): 22:1-22:15 (2014) - [c12]Moo-Kyoung Chung, Jun-Kyoung Kim, Soojung Ryu:
SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading. ISCAS 2014: 1472-1475 - 2013
- [j3]Jinho Lee
, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu, Jung Ho Ahn
Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1748-1761 (2013) - [c11]Moo-Kyoung Chung, Jun-Kyoung Kim, Yeon-Gon Cho, Soojung Ryu:
Adaptive compression for instruction code of Coarse Grained Reconfigurable Architectures. FPT 2013: 394-397 - 2012
- [c10]Seunghun Jin, Sang-Heon Lee, Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu:
Implementation of a volume rendering on coarse-grained reconfigurable multiprocessor. FPT 2012: 243-246 - [c9]Changmoo Kim, Moo-Kyoung Chung, Yeon-Gon Cho, Mario Konijnenburg, Soojung Ryu, Jeongwook Kim:
ULP-SRP: Ultra low power Samsung Reconfigurable Processor for biomedical applications. FPT 2012: 329-334 - [c8]Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu:
Efficient code compression for coarse grained reconfigurable architectures. ICCD 2012: 488-489 - [c7]Kiyeon Lee, Moo-Kyoung Chung, Soojung Ryu, Yeon-Gon Cho, Sangyeun Cho:
Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors. ICCD 2012: 500-501 - 2010
- [c6]Sang-Heon Lee, Nak-Woong Eum, Moo-Kyoung Chung, Chong-Min Kyung:
Low latency variable length coding scheme for frame memory recompression. ICME 2010: 232-237
2000 – 2009
- 2009
- [j2]Sang-Heon Lee, Moo-Kyoung Chung, Sung-Mo Park, Chong-Min Kyung:
Lossless frame memory recompression for video codec preserving random accessibility of coding unit. IEEE Trans. Consumer Electron. 55(4): 2105-2113 (2009) - 2007
- [c5]Sung-Joon Jang, Moo-Kyoung Chung, Jaemoon Kim, Chong-Min Kyung:
Cache Miss-Aware Dynamic Stack Allocation. ISCAS 2007: 3494-3497 - [i1]Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung:
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation. CoRR abs/0710.4701 (2007) - 2006
- [j1]Moo-Kyoung Chung, Chong-Min Kyung:
Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead. IEEE Trans. Computers 55(2): 125-136 (2006) - [c4]Moo-Kyoung Chung, Chong-Min Kyung:
Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction. PADS 2006: 11-18 - 2005
- [c3]Jae-Gon Lee
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation. DATE 2005: 384-389 - [c2]Moo-Kyoung Chung, Heejun Shim, Chong-Min Kyung:
Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication. IEEE International Workshop on Rapid System Prototyping 2005: 158-164 - 2004
- [c1]Moo-Kyoung Chung, Chong-Min Kyung:
Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a. IEEE International Workshop on Rapid System Prototyping 2004: 38-44
Coauthor Index
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