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Riichiro Shirota
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2010 – 2019
- 2015
- [c3]Riichiro Shirota, Bo-Jun Yang, Yung-Yueh Chiu
, Yu-Ting Wu, Pin-Yao Wang, Jung-Ho Chang, Masaru Yano, Minoru Aoki, Toshiaki Takeshita, C.-Y. Wang, Ikuo Kurachi:
Improvement of oxide reliability in NAND flash memories using tight endurance cycling with shorter idling period. IRPS 2015: 12
2000 – 2009
- 2006
- [c2]Riichiro Shirota:
Roadmap of the Flash Memory. MTDT 2006 - 2002
- [j6]Kenichi Imamiya, Hiroshi Nakamura, Toshihiko Himeno, Toshio Yamamura, Tamio Ikehashi, Ken Takeuchi, Kazushige Kanda, Koji Hosono, Takuya Futatsuyama, Koichi Kawai, Riichiro Shirota, Norihisa Arai, Fumitaka Arai, Kazuo Hatakeyama, Hiroaki Hazama, Masanobu Saito, Hisataka Meguro, Kevin Conley, Khandker Quader, Jian J. Che:
A 125-mm2 1-Gb NAND flash memory with 10-MByte/s program speed. IEEE J. Solid State Circuits 37(11): 1493-1501 (2002) - [c1]Riichiro Shirota:
Test and Repair of Non-Volatile Commodity and Embedded Memories (NAND Flash Memory). ITC 2002: 1221
1990 – 1999
- 1999
- [j5]Kenichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Toshihiko Himeno, Ken Takeuchi, Tamio Ikehashi, Kazushige Kanda, Koji Hosono, Riichiro Shirota, Seiichi Aritome, Kazuhiro Shimizu, Kazuo Hatakeyama, Koji Sakui:
A 130-mm/2, 256-Mbit NAND flash with shallow trench isolation technology. IEEE J. Solid State Circuits 34(11): 1536-1543 (1999) - 1997
- [j4]Toru Tanzawa
A compact on-chip ECC for low cost flash memories. IEEE J. Solid State Circuits 32(5): 662-669 (1997) - 1994
- [j3]Tomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara:
A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory. IEEE J. Solid State Circuits 29(11): 1366-1373 (1994) - 1993
- [j2]Seiichi Aritome, Riichiro Shirota, Gertjan Hemink, Tetsuo Endoh, Fujio Masuoka:
Reliability issues of flash memory cells. Proc. IEEE 81(5): 776-788 (1993)
1980 – 1989
- 1989
- [j1]Masaki Momodomi, Yasuo Itoh, Riichiro Shirota, Yoshihisa Iwata, Ryozo Nakayama, Ryouhei Kirisawa, Tomoharu Tanaka, Seiichi Aritome, Tetsuo Endoh, Kazunori Ohuchi, Fujjo Masuoka:
An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell. IEEE J. Solid State Circuits 24(5): 1238-1243 (1989)
Coauthor Index
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