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Suvadeep Banerjee
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2020 – today
- 2024
- [j8]Shamik Kundu
, Suvadeep Banerjee
DiagNNose: Toward Error Localization in Deep Learning Hardware-Based on VTA-TVM Stack. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 217-229 (2024) - [c29]Sanjay Das, Shamik Kundu, Pooja Madhusoodhanan, Viswanathan Pillai Prasanth, Rubin A. Parekhji, Arnab Raha, Suvadeep Banerjee, Suriya Natarajan, Kanad Basu:
Graph Learning-based Fault Criticality Analysis for Enhancing Functional Safety of E/E Systems. DAC 2024: 206:1-206:6 - [i3]Ayush Arunachalam, Ian Kintz, Suvadeep Banerjee, Arnab Raha, Xiankun Jin, Fei Su, Viswanathan Pillai Prasanth, Rubin A. Parekhji, Suriyaprakash Natarajan, Kanad Basu:
Enhancing Functional Safety in Automotive AMS Circuits through Unsupervised Machine Learning. CoRR abs/2404.01632 (2024) - 2023
- [j7]Shamik Kundu
Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators. IEEE Des. Test 40(2): 90-99 (2023) - [j6]Shamik Kundu
Trouble-Shooting at GAN Point: Improving Functional Safety in Deep Learning Accelerators. IEEE Trans. Computers 72(8): 2194-2208 (2023) - [j5]Ayush Arunachalam
A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1085-1098 (2023) - [c28]Susmita Dey Manasi, Suvadeep Banerjee, Abhijit Davare, Anton A. Sorokin, Steven M. Burns, Desmond A. Kirkpatrick, Sachin S. Sapatnekar:
Reusing GEMM Hardware for Efficient Execution of Depthwise Separable Convolution on ASIC-Based DNN Accelerators. ASP-DAC 2023: 475-482 - [c27]Ayush Arunachalam, Sanjay Das, Monikka Rajan, Fei Su, Xiankun Jin, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu:
Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits. ITC 2023: 266-275 - 2022
- [c26]Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Kanad Basu:
Fault Resilience of DNN Accelerators for Compressed Sensor Inputs. ISVLSI 2022: 329-332 - [c25]Ayush Arunachalam, Athulya Kizhakkayil, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Robert Jin, Fei Su, Kanad Basu:
Unsupervised Learning-based Early Anomaly Detection in AMS Circuits of Automotive SoCs. ITC 2022: 229-238 - [c24]Suriyaprakash Natarajan, Abhijit Sathaye, Chaitali Oak, Nipun Chaplot, Suvadeep Banerjee:
DEFCON: Defect Acceleration through Content Optimization. ITC 2022: 298-304 - [c23]Shamik Kundu, Suvadeep Banerjee
Special Session: Effective In-field Testing of Deep Neural Network Hardware Accelerators. VTS 2022: 1-4 - 2021
- [j4]Suvadeep Banerjee
Real-Time Error Detection in Nonlinear Control Systems Using Machine Learning Assisted State-Space Encoding. IEEE Trans. Dependable Secur. Comput. 18(2): 576-592 (2021) - [j3]Shamik Kundu
Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators. IEEE Trans. Very Large Scale Integr. Syst. 29(3): 485-498 (2021) - [c22]Suvadeep Banerjee
Online Fast Detection and Diagnosis of Power Grid Security Attacks Using State Checksums. IOLTS 2021: 1-7 - [c21]Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee
HardCompress: A Novel Hardware-based Low-power Compression Scheme for DNN Accelerators. ISQED 2021: 457-462 - [i2]Yash Akhauri, Adithya Niranjan, J. Pablo Muñoz, Suvadeep Banerjee, Abhijit Davare, Pasquale Cocchini, Anton A. Sorokin, Ravi Iyer, Nilesh Jain:
RHNAS: Realizable Hardware and Neural Architecture Search. CoRR abs/2106.09180 (2021) - [i1]Suvadeep Banerjee, Steve Burns, Pasquale Cocchini, Abhijit Davare, Shweta Jain, Desmond Kirkpatrick, Anton Sorokin, Jin Yang, Zhenkun Yang:
A Highly Configurable Hardware/Software Stack for DNN Inference Acceleration. CoRR abs/2111.15024 (2021)
2010 – 2019
- 2019
- [j2]Suvadeep Banerjee
ALERA: Accelerated Reinforcement Learning Driven Adaptation to Electro-Mechanical Degradation in Nonlinear Control Systems Using Encoded State Space Error Signatures. ACM Trans. Intell. Syst. Technol. 10(4): 44:1-44:25 (2019) - [c20]Barry John Muldrey, Suvadeep Banerjee
Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery. VTS 2019: 1-6 - 2018
- [b1]Suvadeep Banerjee:
State-space encoding driven error resilience in control systems and circuits. Georgia Institute of Technology, Atlanta, GA, USA, 2018 - [c19]Sujay Pandey, Suvadeep Banerjee
ReiNN: Efficient error resilience in artificial neural networks using encoded consistency checks. ETS 2018: 1-2 - [c18]Sujay Pandey, Suvadeep Banerjee
Error Resilient Neuromorphic Networks Using Checker Neurons. IOLTS 2018: 135-138 - [c17]Md Imran Momtaz, Suvadeep Banerjee
Cross-Layer Control Adaptation for Autonomous System Resilience. IOLTS 2018: 261-264 - 2017
- [c16]Suvadeep Banerjee
Real-time self-learning for control law adaptation in nonlinear systems using encoded check states. ETS 2017: 1-6 - [c15]Jacob A. Abraham, Suvadeep Banerjee
Design of efficient error resilience in signal processing and control systems: From algorithms to circuits. IOLTS 2017: 192-195 - [c14]Md Imran Momtaz, Suvadeep Banerjee
Probabilistic error detection and correction in switched capacitor circuits using checksum codes. IOLTS 2017: 271-276 - [c13]Md Imran Momtaz, Suvadeep Banerjee
On-line diagnosis and compensation for parametric failures in linear state variable circuits and systems using time-domain checksum observers. VTS 2017: 1-6 - 2016
- [c12]Sujay Pandey, Suvadeep Banerjee
Concurrent error detection and tolerance in Kalman filters using encoded state and statistical covariance checks. IOLTS 2016: 161-166 - [c11]Suvadeep Banerjee
Efficient cross-layer concurrent error detection in nonlinear control systems using mapped predictive check states. ITC 2016: 1-10 - [c10]Suvadeep Banerjee
Checksum based error detection in linearized representations of non linear control systems. LATS 2016: 182 - [c9]Suvadeep Banerjee
Infant mortality tests for analog and mixed-signal circuits. VTS 2016: 1-6 - [c8]Md Imran Momtaz, Suvadeep Banerjee
Real-time DC motor error detection and control compensation using linear checksums. VTS 2016: 1-6 - 2015
- [c7]Suvadeep Banerjee
Concurrent error detection in nonlinear digital filters using checksum linearization and residue prediction. IOLTS 2015: 53-58 - [c6]Debesh Bhatta, Suvadeep Banerjee
A Noise Aware CML Latch Modelling for Large System Simulation. VLSID 2015: 286-291 - 2014
- [c5]Suvadeep Banerjee
Error Resilient Real-Time State Variable Systems for Signal Processing and Control. ATS 2014: 39-44 - [c4]Suvadeep Banerjee
Design of low cost fault tolerant analog circuits using real-time learned error compensation. ETS 2014: 1-2 - [c3]Álvaro Gómez-Pau, Suvadeep Banerjee
Real-time transient error and induced noise cancellation in linear analog filters using learning-assisted adaptive analog checksums. IOLTS 2014: 25-30 - 2013
- [c2]Suvadeep Banerjee
Enhanced Resolution Time-Domain Reflectometry for High Speed Channels: Characterizing Spatial Discontinuities with Non-ideal Stimulus. Asian Test Symposium 2013: 277-282 - [c1]Suvadeep Banerjee
Real-time checking of linear control systems using analog checksums. IOLTS 2013: 122-127 - 2011
- [j1]Suvadeep Banerjee
Feedback linearizing indirect adaptive fuzzy control with foraging based on-line plant model estimation. Appl. Soft Comput. 11(4): 3441-3450 (2011)
Coauthor Index
aka: Suriya Natarajan
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last updated on 2024-11-13 23:52 CET by the dblp team
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