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Barry John Muldrey
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2020 – today
- 2023
- [j8]Sabyasachi Deyati
, Barry John Muldrey, Abhijit Chatterjee:
BISCC: A Novel Approach to Built In State Consistency Checking For Quick Volume Validation of Mixed-Signal/RF Systems. J. Electron. Test. 39(3): 303-322 (2023) - [j7]Maisha Sadia
Robust Chaos With Novel 4-Transistor Maps. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 914-918 (2023) - 2022
- [j6]Partha Sarathi Paul
Cascading CMOS-Based Chaotic Maps for Improved Performance and Its Application in Efficient RNG Design. IEEE Access 10: 33758-33770 (2022) - [c20]Jacob Barnes, Barry John Muldrey, Charles Walter:
Toward the creation of a novel electric bike rental program to ease university congestion. ACM Southeast Regional Conference 2022: 191-195 - 2021
- [j5]Sabyasachi Deyati
High Resolution Pulse Propagation Driven Trojan Detection in Digital Systems. J. Electron. Test. 37(1): 41-63 (2021) - [c19]Partha Sarathi Paul, Maisha Sadia, Md Razuan Hossain, Barry J. Muldrey, Md Sakib Hasan
Design of a Low-Overhead Random Number Generator Using CMOS-based Cascaded Chaotic Maps. ACM Great Lakes Symposium on VLSI 2021: 109-114 - [c18]Partha Sarathi Paul, Anurag Dhungel, Maisha Sadia, Md Razuan Hossain, Barry John Muldrey, Md Sakib Hasan
Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range. ICECS 2021: 1-5 - [c17]Maisha Sadia, Partha Sarathi Paul, Md Razuan Hossain, Barry J. Muldrey, Md Sakib Hasan
Design and Application of a Novel 4-Transistor Chaotic Map with Robust Performance. ICECS 2021: 1-5 - 2020
- [j4]Sabyasachi Deyati
Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2006-2019 (2020)
2010 – 2019
- 2019
- [b1]Barry John Muldrey:
Algorithms for Post-silicon Validation and Debug of Radio-frequency, analog, and mixed-signal Circuits and Systems. Georgia Institute of Technology, Atlanta, GA, USA, 2019 - [c16]Barry John Muldrey, Suvadeep Banerjee
Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery. VTS 2019: 1-6 - 2017
- [j3]Debashis Banerjee, Barry John Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee:
Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 195-207 (2017) - [c15]Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee:
BISCC: Efficient pre through post silicon validation of mixed-signal/RF systems using built in state consistency checking. DATE 2017: 274-277 - [c14]Sabyasachi Deyati, Barry J. Muldrey, Byunghoo Jung, Abhijit Chatterjee:
Concurrent built in test and tuning of beamforming MIMO systems using learning assisted performance optimization. ITC 2017: 1-10 - [c13]Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee:
Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware. VLSID 2017: 403-408 - 2016
- [j2]Nicholas Tzou, Debesh Bhatta, Xian Wang, Te-Hui Chen, Sen-Wen Hsiao, Barry J. Muldrey
Concurrent Multi-Channel Crosstalk Jitter Characterization Using Coprime Period Channel Stimulus. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(6): 859-870 (2016) - [c12]Barry John Muldrey
Concurrent Stimulus and Defect Magnitude Optimization for Detection of Weakest Shorts and Opens in Analog Circuits. ATS 2016: 96-101 - [c11]Sabyasachi Deyati, Barry John Muldrey
Trojan detection in digital systems using current sensing of pulse propagation in logic gates. ISQED 2016: 350-355 - [c10]Barry John Muldrey
DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems. ITC 2016: 1-10 - [c9]Sabyasachi Deyati, Barry John Muldrey
TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm. VLSID 2016: 463-468 - [c8]Sabyasachi Deyati, Barry John Muldrey
Adaptive testing of analog/RF circuits using hardware extracted FSM models. VTS 2016: 1-6 - 2015
- [j1]Nicholas Tzou, Debesh Bhatta, Barry J. Muldrey
Low Cost Sparse Multiband Signal Characterization Using Asynchronous Multi-Rate Sampling: Algorithms and Hardware. J. Electron. Test. 31(1): 85-98 (2015) - [c7]Sabyasachi Deyati, Barry John Muldrey
Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security. ATS 2015: 127-132 - 2014
- [c6]Sabyasachi Deyati, Barry John Muldrey
High Resolution Pulse Propagation Driven Trojan Detection in Digital Logic: Optimization Algorithms and Infrastructure. ATS 2014: 200-205 - [c5]Debashis Banerjee, Barry John Muldrey
Self-learning MIMO-RF receiver systems: process resilient real-time adaptation to channel conditions for low power operation. ICCAD 2014: 710-717 - [c4]Sabyasachi Deyati, Barry John Muldrey
Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits. VTS 2014: 1-6 - 2013
- [c3]Sabyasachi Deyati, Aritra Banerjee, Barry John Muldrey
VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests. VLSI Design 2013: 314-319 - [c2]Barry John Muldrey
RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning. VTS 2013: 1-6 - 2012
- [c1]Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey
Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits. ICCAD 2012: 553-556
Coauthor Index
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