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David Grant
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2020 – today
- 2021
- [c12]Stefan A. Robila, David Grant, Chris DePrater, Vali Sorell, Terry L. Rodgers, David Martinez, Shlomo Novotny:
Cooling the Data Center: Design of a Mechanical Controls Owner Project Requirements (OPR) Template. CLUSTER 2021: 591-595 - 2020
- [i2]David Grant, John D. Massman III, Srimathy Srinivasan:
Differential Codes on Higher Dimensional Varieties Via Grothendieck's Residue Symbol. CoRR abs/2009.09311 (2020)
2010 – 2019
- 2017
- [j10]David Grant, Mahesh K. Varanasi:
Feasibility of Single-Beam Interference Alignment in Multi-Carrier Interference Channels. IEEE Trans. Inf. Theory 63(11): 7352-7357 (2017) - 2014
- [j9]Steve Limburg, David Grant, Mahesh K. Varanasi:
Higher genus universally decodable matrices (UDMG). Adv. Math. Commun. 8(3): 257-270 (2014) - [j8]David Grant:
The Quadratic Gauss Sum Redux. Am. Math. Mon. 121(2): 145-149 (2014) - 2013
- [j7]David Grant, Sue Newell:
Realizing the strategic potential of e-HRM. J. Strateg. Inf. Syst. 22(3): 187-192 (2013) - [i1]Steve Limburg, David Grant, Mahesh K. Varanasi:
Higher genus universally decodable matrices (UDMG). CoRR abs/1301.6117 (2013) - 2012
- [j6]David Grant, Graeme Smecher, Guy G. F. Lemieux, Rosemary Francis:
Rapid Synthesis and Simulation of Computational Circuits in an MPPA. J. Signal Process. Syst. 67(1): 47-63 (2012) - [c11]Thuy Dao, Tania Thomas, David Marx, David Grant:
Evaluation of non-destructive etch depth measurement for through silicon vias. ICICDT 2012: 1-4 - 2011
- [j5]Kinshuman Kinshumann, Kirk Glerum, Steve Greenberg, Gabriel Aul, Vince R. Orgovan, Greg Nichols, David Grant, Gretchen Loihle, Galen C. Hunt:
Debugging in the (very) large: ten years of implementation and experience. Commun. ACM 54(7): 111-116 (2011) - [c10]David Grant, Chris C. Wang, Guy G. Lemieux:
A CAD framework for Malibu: an FPGA with time-multiplexed coarse-grained elements. FPGA 2011: 123-132
2000 – 2009
- 2009
- [c9]David Marx, David Grant, Russ Dudley, Andy Rudack, W. H. Teh:
Wafer Thickness Sensor (WTS) for etch depth measurement of TSV. 3DIC 2009: 1-5 - [c8]Weng Hong Teh, Raymond Caramto, Jamal Qureshi, Sitaram Arkalgud, M. O'Brien, T. Gilday, Kou Maekawa, T. Saito, Kouichi Maruyama, Thenappan Chidambaram, Wei Wang, David Marx, David Grant, Russ Dudley:
A route towards production-worthy 5 µm × 25 µm and 1 µm × 20 µm non-Bosch through-silicon-via (TSV) etch, TSV metrology, and TSV integration. 3DIC 2009: 1-5 - [c7]David Grant, Graeme Smecher, Guy Lemieux, Rosemary Francis:
Rapid synthesis and simulation of computational circuits in an MPPA. FPT 2009: 151-158 - [c6]Kirk Glerum, Kinshuman Kinshumann, Steve Greenberg, Gabriel Aul, Vince R. Orgovan, Greg Nichols, David Grant, Gretchen Loihle, Galen C. Hunt:
Debugging in the (very) large: ten years of implementation and experience. SOSP 2009: 103-116 - 2008
- [j4]David Grant, Mahesh K. Varanasi:
Duality theory for space-time codes over finite fields. Adv. Math. Commun. 2(1): 35-54 (2008) - [j3]David Grant, Mahesh K. Varanasi:
The equivalence of space-time codes and codes defined over finite fields and Galois rings. Adv. Math. Commun. 2(2): 131-145 (2008) - [j2]David Grant, Guy G. Lemieux:
Perturb+mutate: Semisynthetic circuit generation for incremental placement and routing. ACM Trans. Reconfigurable Technol. Syst. 1(3): 16:1-16:24 (2008) - [c5]Kevin Bartz, Jack W. Stokes, John C. Platt, Ryan Kivett, David Grant, Silviu Calinoiu, Gretchen Loihle:
Finding Similar Failures Using Callstack Similarity. SysML 2008 - 2006
- [c4]David Grant, Scott Chin, Guy G. Lemieux:
Semi-Synthetic Circuit Generation Using Graph Monomorphism for Testing Incremental Placement and Incremental Routing Tools. FPL 2006: 1-4 - [c3]David Grant, Guy Lemieux:
Perturber: semi-synthetic circuit generation using ancestor control for testing incremental place and route. FPT 2006: 189-196 - 2004
- [c2]David Grant, William D. Bishop, Wayne M. Loucks:
A Flexible Processor for Research Prototyping. ERSA 2004: 314
1990 – 1999
- 1994
- [j1]David Grant, John Taylor, Paul Houselander:
Design, implementation and evaluation of a high-speed integrated Hamming neural classifier. IEEE J. Solid State Circuits 29(9): 1154-1157 (1994) - [c1]David Grant, John Taylor, Paul Houselander:
A High-Speed Integrated Hamming Neural Classifier. ISCAS 1994: 479-482
Coauthor Index
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