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Sunil K. Jain

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2000 – 2009

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2001
[c5]
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Sunil K. Jain, Greg P. Chema:
Testing beyond EPA: TDF methodology solutions matrix. ITC 2001: 424-432

1980 – 1989

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1986
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Sunil K. Jain, Charles E. Stroud:
Built-in Self Testing of Embedded Memories. IEEE Des. Test 3(5): 27-37 (1986)
1985
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Sunil K. Jain, Vishwani D. Agrawal:
Statistical Fault Analysis. IEEE Des. Test 2(1): 38-44 (1985)
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Sunil K. Jain, Vishwani D. Agrawal:
Modeling and Test Generation Algorithms for MOS Circuits. IEEE Trans. Computers 34(5): 426-433 (1985)
1984
[c4]
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Sunil K. Jain, Vishwani D. Agrawal:
STAFAN: An alternative to fault simulation. DAC 1984: 18-23
[c3]
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Sudhakar M. Reddy, Vishwani D. Agrawal, Sunil K. Jain:
A gate level model for CMOS combinational logic circuits with application to fault detection. DAC 1984: 504-509
1983
[c2]
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Sunil K. Jain, Vishwani D. Agrawal:
Test generation for MOS circuits using D-algorithm. DAC 1983: 64-70
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Sunil K. Jain, Alfred K. Susskind:
Test strategy for microprocessers. DAC 1983: 703-708

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