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Toshiki Kanamoto
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2020 – today
- 2023
- [j30]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A parabolic spiral coil transmitter with uniform magnetic field for smart devices. IEICE Electron. Express 20(1): 20220492 (2023) - [j29]Taisei Arima, Shigeru Hidaka, Ryosuke Watanabe, Tomoya Akasaka, Atsushi Kurokawa, Toshiki Kanamoto:
A thermally optimizing method of thin film resistor trimming with machine learning. IEICE Electron. Express 20(5): 20230014 (2023) - [j28]Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa:
Bayesian neural network based inductance calculations of wireless power transfer systems. IEICE Electron. Express 20(5): 20230030 (2023) - [j27]Kyosuke Kusumi, Koutaro Hachiya, Ryotaro Kudo, Toshiki Kanamoto, Atsushi Kurokawa:
Electronic component placement optimization for heat measures of smartglasses. IEICE Electron. Express 20(6): 20230011 (2023) - [c11]Mai Yamaguchi, Mai Yamakawa, Seiji Mochizuki, Kousuke Imamura, Toshiki Kanamoto, Tetsuya Matsumura:
Ultra-Low-Latency Video Coding with Reduced Frame Memory Structure for 4K/8K High-Resolution Video. GCCE 2023: 852-853 - [c10]Fumiya Sano, Kouki Fukuda, Shinji Kubo, Sumio Tanba, Yamato Ishida, Atushi Kurokawa, Toshiki Kanamoto:
LoRa Based Wireless Sensor Network for Bus Tracking System in Contoured Castle Town. GCCE 2023: 891-892 - 2022
- [j26]Shinsuke Kashiwazaki, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa:
Receiver coil built into belt for heat dissipation of watch-type smart devices. IEICE Electron. Express 19(3): 20210497 (2022) - [j25]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A bernoulli spiral coil transmitter for charging various small electronic devices. IEICE Electron. Express 19(23): 20220419 (2022) - [c9]Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa:
Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems. GCCE 2022: 222-223 - [c8]Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa:
A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers. GCCE 2022: 224-225 - [c7]Ryosuke Watanabe, Shigeru Hidaka, Tomoya Akasaka, Shota Kajiya, Taisei Arima, Atsushi Kurokawa, Toshiki Kanamoto:
Enhanced laser trimming of thin film resistors dedicated to snubber for high power IGBT modules. MWSCAS 2022: 1-4 - 2021
- [j24]Peng Yang, Tomoyuki Nagase
, Toshiki Kanamoto
A Virtual Optical Holographic Encryption System Using Expanded Diffie-Hellman Algorithm. IEEE Access 9: 22071-22077 (2021) - [j23]Kodai Matsuhashi, Koutaro Hachiya, Toshiki Kanamoto, Shinsuke Kashiwazaki, Kyosuke Kusumi, Atsushi Kurokawa:
Effective methods to promote heat dissipation of wrist wearables. IEICE Electron. Express 18(5): 20210017 (2021) - 2020
- [j22]Yuuta Satomi, Koutaro Hachiya, Toshiki Kanamoto
Thermal placement on PCB of components including 3D ICs. IEICE Electron. Express 17(3): 20190737 (2020) - [j21]Toshiki Kanamoto
A simple yet precise capacitance estimation method for on-chip power delivery network towards EMC analysis. IEICE Electron. Express 17(14): 20200198 (2020) - [j20]Kodai Matsuhashi, Toshiki Kanamoto
Thermal Model and Countermeasures for Future Smart Glasses. Sensors 20(5): 1446 (2020)
2010 – 2019
- 2019
- [c6]Koutaro Inaba, Tomohiro Yoneda, Toshiki Kanamoto
Hardware Trojan Insertion and Detection in Asynchronous Circuits. ASYNC 2019: 134-143 - [c5]Toshiki Kanamoto
A Single-Stage RISC-V Processor to Mitigate the Von Neumann Bottleneck. MWSCAS 2019: 1085-1088 - 2018
- [j19]Kazuyuki Sakata, Takashi Hasegawa, Kouji Ichikawa, Toshiki Kanamoto
Impact of mutual inductance on timing in nano-scale SoC. IEICE Electron. Express 15(11): 20180376 (2018) - 2015
- [j18]Toshiki Kanamoto
Structure optimization for timing in nano scale FinFET. IEICE Electron. Express 12(9): 20150297 (2015) - 2014
- [j17]Toshiki Kanamoto
Resistivity-based modeling of substrate non-uniformity for low-resistivity substrate. IEICE Electron. Express 11(3): 20130813 (2014) - 2013
- [j16]Yasuhiro Ogasahara
Supply Noise Suppression by Triple-Well Structure. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 781-785 (2013) - 2010
- [j15]Toshiki Kanamoto
Impact of Self-Heating in Wire Interconnection on Timing. IEICE Trans. Electron. 93-C(3): 388-392 (2010) - [j14]Kenta Yamada, Toshiyuki Syo, Hisao Yoshimura, Masaru Ito, Tatsuya Kunikiyo, Toshiki Kanamoto
Exhaustive and Systematic Accuracy Verification and Enhancement of STI Stress Compact Model for General Realistic Layout Patterns. IEICE Trans. Electron. 93-C(8): 1349-1358 (2010) - [j13]Takashi Sato, Toshiki Kanamoto
A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(9): 1605-1611 (2010)
2000 – 2009
- 2009
- [j12]Takaaki Okumura, Atsushi Kurokawa, Hiroo Masuda, Toshiki Kanamoto
Improvement in Computational Accuracy of Output Transition Time Variation Considering Threshold Voltage Variations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 990-997 (2009) - [j11]Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato
An Approach for Reducing Leakage Current Variation due to Manufacturing Variability. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3016-3023 (2009) - 2008
- [j10]Toshiki Kanamoto
Impact of Well Edge Proximity Effect on Timing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3461-3464 (2008) - [j9]Keiichi Suemitsu, Toshiaki Ito, Toshiki Kanamoto
A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3524-3530 (2008) - 2007
- [j8]Masahiko Omura, Toshiki Kanamoto
A Fast Characterizing Method for Large Embedded Memory Modules on SoC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(4): 815-822 (2007) - [c4]Toshiki Kanamoto
Impact of well edge proximity effect on timing. ESSCIRC 2007: 115-118 - 2006
- [j7]Atsushi Kurokawa, Akira Kasebe, Toshiki Kanamoto
Formula-Based Method for Capacitance Extraction of Interconnects with Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(4): 847-855 (2006) - [j6]Toshiki Kanamoto
Si-Substrate Modeling toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3560-3568 (2006) - [j5]Toshiki Kanamoto
Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3666-3670 (2006) - 2005
- [j4]Atsushi Kurokawa, Toshiki Kanamoto
A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(11): 3180-3187 (2005) - [j3]Toshiki Kanamoto
A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3463-3470 (2005) - [j2]Atsushi Kurokawa, Toshiki Kanamoto
Efficient Dummy Filling Methods to Reduce Interconnect Capacitance and Number of Dummy Metal Fills. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(12): 3471-3478 (2005) - [c3]Atsushi Kurokawa, Toshiki Kanamoto
Dummy Filling Methods for Reducing Interconnect Capacitance and Number of Fills. ISQED 2005: 586-591 - 2004
- [c2]Atsushi Kurokawa, Toshiki Kanamoto, Akira Kasebe, Yasuaki Inoue, Hiroo Masuda:
Efficient capacitance extraction method for interconnects with dummy fills. CICC 2004: 485-488 - 2003
- [c1]Takashi Sato, Toshiki Kanamoto, Atsushi Kurokawa, Yoshiyuki Kawakami, Hiroki Oka, Tomoyasu Kitaura, Hiroyuki Kobayashi, Masanori Hashimoto:
Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF. ASP-DAC 2003: 149-155
1990 – 1999
- 1999
- [j1]Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto
The D30V/MPEG multimedia processor. IEEE Micro 19(4): 38-47 (1999)
Coauthor Index
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