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Srinivas Reddy
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2010 – 2019
- 2012
- [j2]Srinivas Reddy, Chandra R. Murthy:
Dual-Stage Power Management Algorithms for Energy Harvesting Sensors. IEEE Trans. Wirel. Commun. 11(4): 1434-1445 (2012) - 2011
- [j1]Simon Lacey, Henrik Hagtvedt, Vanessa M. Patrick, Amy Anderson, Randall Stilla, Gopikrishna Deshpande, Xiaoping Hu, João R. Sato, Srinivas Reddy, Krish Sathian:
Art for reward's sake: Visual art recruits the ventral striatum. NeuroImage 55(1): 420-433 (2011) - [c6]Srinivas Reddy, Chandra R. Murthy:
Duty cycling and power management with a network of energy harvesting sensors. CAMSAP 2011: 205-208 - 2010
- [c5]Srinivas Reddy, Chandra R. Murthy:
Profile-Based Load Scheduling in Wireless Energy Harvesting Sensors for Data Rate Maximization. ICC 2010: 1-5
2000 – 2009
- 2005
- [c4]David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose:
The Stratix II logic and routing architecture. FPGA 2005: 14-20 - 2003
- [c3]David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose:
The StratixTM routing and logic architecture. FPGA 2003: 12-20
1990 – 1999
- 1999
- [c2]Richard Cliff, Srinivas Reddy, Cameron McClintock, David Jefferslon, Christopher Lane, Ketan Zaveri, Manuel Mejia, Andy Lee, Ninh Ngo, Risa Altaf, Bruce Pedersen, Frank Heile, Jay Schleicher, John Turner:
A next generation architecture optimized for high density system level integration. CICC 1999: 175-178 - 1998
- [c1]David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff:
A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). FPGA 1998: 256
Coauthor Index
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