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Keivan Navi
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2020 – today
- 2024
- [j119]Ahmad Karimi, Keivan Navi
:
The design of adder, subtractor, and derivative circuits without the use of op-amp in CNFET Technology. Comput. Electr. Eng. 113: 109047 (2024) - [j118]Pegah Foroutan, Keivan Navi
A Novel Current Mode Approximate Multiplier Scheme Based on 4:2 and 5:2 Compressors with Low Power Consumption and High Speed in CNTFET Technology. Circuits Syst. Signal Process. 43(5): 3042-3072 (2024) - 2023
- [j117]Ehsan Faghih, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh:
Efficient realization of quantum balanced ternary reversible multiplier building blocks: A great step towards sustainable computing. Sustain. Comput. Informatics Syst. 40: 100908 (2023) - 2022
- [j116]Mehdi Takbiri, Keivan Navi
Systematic Transistor Sizing of a CNFET-Based Ternary Inverter for High Performance and Noise Margin Enlargement. IEEE Access 10: 10553-10565 (2022) - [j115]Seyedeh Bahareh Zakaria, Keivan Navi:
Image encryption and decryption using exclusive-OR based on ternary value logic. Comput. Electr. Eng. 101: 108021 (2022) - [j114]Diganta Sengupta
Reversible quantum communication & systems. IET Quantum Commun. 3(1): 1-4 (2022) - [j113]Seyed Mahdi Ghadamgahi, Reza Sabbaghi-Nadooshan
Novel ternary adders and subtractors in quantum cellular automata. J. Supercomput. 78(17): 18454-18496 (2022) - 2021
- [j112]Hamidreza Uoosefian, Keivan Navi
Two Novel Current-Mode CNFET-Based Full Adders Using ULPD as Voltage Regulator. J. Circuits Syst. Comput. 30(6): 2150101:1-2150101:28 (2021) - [j111]MohammadReza Taheri
Efficient Incorporation of the RNS Datapath in Reverse Converter. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1388-1392 (2021) - 2020
- [j110]Seyede Fateme Kamali
Designing positive, negative and standard gates for ternary logics using quantum dot cellular automata. Comput. Electr. Eng. 83: 106590 (2020) - [j109]Ali Bozorgmehr, Mohammad Khaleqi Qaleh Jooq, Mohammad Hossein Moaiyeri
A novel digital fuzzy system for image edge detection based on wrap-gate carbon nanotube transistors. Comput. Electr. Eng. 87: 106811 (2020) - [j108]Ehsan PourAliAkbar
Novel Optimum Parity-Preserving Reversible Multiplier Circuits. Circuits Syst. Signal Process. 39(10): 5148-5168 (2020) - [j107]Amir Abbas Baradaran
HQCA-WSN: High-quality clustering algorithm and optimal cluster head selection using fuzzy logic in wireless sensor networks. Fuzzy Sets Syst. 389: 114-144 (2020) - [j106]Amin Avan
High-speed energy efficient process, voltage and temperature tolerant hybrid multi-threshold 4: 2 compressor design in CNFET technology. IET Circuits Devices Syst. 14(3): 357-368 (2020) - [j105]Nooshin Azimi, Reza Faghih Mirzaee
Ternary DDCVSL: a combined dynamic logic style for standard ternary logic with single power source. IET Comput. Digit. Tech. 14(4): 166-175 (2020) - [j104]MohammadReza Taheri, Armineh Arasteh, Somaye Mohammadyan, Atiyeh Panahi, Keivan Navi:
A novel majority based imprecise 4: 2 compressor with respect to the current and future VLSI industry. Microprocess. Microsystems 73: 102962 (2020) - [j103]Mostafa Sadeghi
Novel efficient full adder and full subtractor designs in quantum cellular automata. J. Supercomput. 76(3): 2191-2205 (2020) - [i8]Omid Daei, Keivan Navi, Mariam Zomorodi Moghadam:
Optimized Quantum Circuit Partitioning. CoRR abs/2005.11614 (2020)
2010 – 2019
- 2019
- [j102]Mehdi Takbiri, Reza Faghih Mirzaee
Analytical Review of Noise Margin in MVL: Clarification of a Deceptive Matter. Circuits Syst. Signal Process. 38(9): 4280-4301 (2019) - [j101]Hesam Hasanpour, Ramak Ghavamizadeh Meibodi, Keivan Navi:
Optimal selection of ensemble classifiers using particle swarm optimization and diversity measures. Intell. Decis. Technol. 13(1): 131-137 (2019) - [j100]Sepehr Tabrizchi
Novel CNFET ternary circuit techniques for high-performance and energy-efficient design. IET Circuits Devices Syst. 13(2): 193-202 (2019) - [j99]Samira Din Mohammadi, Reza Faghih Mirzaee, Keivan Navi:
Partial product generation for unbalanced ternary signed multiplication. Int. J. High Perform. Syst. Archit. 8(4): 238-249 (2019) - [j98]Maryam Toulabinejad, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
Toward efficient implementation of basic balanced ternary arithmetic operations in CNFET technology. Microelectron. J. 90: 267-277 (2019) - [j97]Hesam Hasanpour, Ramak Ghavamizadeh Meibodi, Keivan Navi:
Improving rule-based classification using Harmony Search. PeerJ Comput. Sci. 5: e188 (2019) - [j96]Sara Hashemi, Mostafa Rahimi Azghadi, Keivan Navi:
Design and analysis of efficient QCA reversible adders. J. Supercomput. 75(4): 2106-2125 (2019) - [i7]Hesam Hasanpour, Ramak Ghavamizadeh Meibodi, Keivan Navi
Improving rule based classification using harmony search. PeerJ Prepr. 7: e27634 (2019) - 2018
- [j95]Narges Hajizadeh Bastani
An Energy- and Area-Efficient Approximate Ternary Adder Based on CNTFET Switching Logic. Circuits Syst. Signal Process. 37(5): 1863-1883 (2018) - [j94]Armineh Arasteh, Mohammad Hossein Moaiyeri
An energy and area efficient 4: 2 compressor based on FinFETs. Integr. 60: 224-231 (2018) - [j93]Mohammad Mehdi Panahi, Omid Hashemipour, Keivan Navi:
A novel design of a ternary coded decimal adder/subtractor using reversible ternary gates. Integr. 62: 353-361 (2018) - [j92]Hossein Mohammadi, Keivan Navi
Energy-Efficient Single-Layer QCA Logical Circuits Based on a Novel XOR Gate. J. Circuits Syst. Comput. 27(14): 1850216:1-1850216:19 (2018) - [j91]Fahimeh Danehdaran, Milad Bagherian Khosroshahy
Design and Power Analysis of New Coplanar One-Bit Full-Adder Cell in Quantum-Dot Cellular Automata. J. Low Power Electron. 14(1): 38-48 (2018) - [j90]Ali Bozorgmehr, Mohammad Hossein Moaiyeri
Ultra-Efficient Fuzzy Min/Max Circuits Based on Carbon Nanotube FETs. IEEE Trans. Fuzzy Syst. 26(2): 1073-1078 (2018) - 2017
- [j89]Mahya Sam Daliri
A new approach for designing compressors with a new hardware-friendly mathematical method for multi-input XOR gates. IET Circuits Devices Syst. 11(1): 46-57 (2017) - [j88]Sepehr Tabrizchi
Method for designing ternary adder cells based on CNFETs. IET Circuits Devices Syst. 11(5): 465-470 (2017) - [j87]Mahya Sam Daliri
High-performance ternary operators for scrambling. Integr. 59: 1-9 (2017) - [j86]Zahra Rouhani, Shaahin Angizi
Towards Approximate Computing with Quantum-Dot Cellular Automata. J. Low Power Electron. 13(1): 29-35 (2017) - [j85]Sepehr Tabrizchi
A novel ternary half adder and multiplier based on carbon nanotube field effect transistors. Frontiers Inf. Technol. Electron. Eng. 18(3): 423-433 (2017) - [j84]Amir Mokhtar Chabi, Arman Roohi, Hossein Khademolhosseini
Towards ultra-efficient QCA reversible circuits. Microprocess. Microsystems 49: 127-138 (2017) - [j83]Milad Bagherian Khosroshahy
Quantum-dot cellular automata circuits with reduced external fixed inputs. Microprocess. Microsystems 50: 154-163 (2017) - [j82]Reza Faghih Mirzaee, Mahya Sam Daliri, Keivan Navi, Nader Bagherzadeh:
A Single Parity-Check Digit for One Trit Error Detection in Ternary Communication Systems: Gate-Level and Transistor-Level Designs. J. Multiple Valued Log. Soft Comput. 29(3-4): 303-326 (2017) - [j81]Amir Abbas Baradaran, Keivan Navi:
CAST-WSN: The Presentation of New Clustering Algorithm Based on Steiner Tree and C-Means Algorithm Improvement in Wireless Sensor Networks. Wirel. Pers. Commun. 97(1): 1323-1344 (2017) - [i6]Fazel Sharifi, Atiyeh Panahi, Mohammad Hossein Moaiyeri, Keivan Navi:
High Performance CNFET-based Ternary Full Adders. CoRR abs/1701.00307 (2017) - 2016
- [j80]Fazel Sharifi, Atiyeh Panahi, Hojjat Sharifi, Keivan Navi, Nader Bagherzadeh
Design of quaternary 4-2 and 5-2 compressors for nanotechnology. Comput. Electr. Eng. 56: 64-74 (2016) - [j79]Sepehr Tabrizchi
A Novel Design Approach for Ternary Compressor Cells Based on CNTFETs. Circuits Syst. Signal Process. 35(9): 3310-3322 (2016) - [j78]Mona Moradi
New Current-Mode Multipliers by CNTFET-Based n-Valued Binary Converters. IEICE Trans. Electron. 99-C(1): 100-107 (2016) - [j77]Mariam Zomorodi Moghadam
Rotation-Based Design and Synthesis of Quantum Circuits. J. Circuits Syst. Comput. 25(12): 1650152:1-1650152:22 (2016) - [j76]Firdous Ahmad, Ghulam Mohiuddin Bhat
Towards single layer quantum-dot cellular automata adders based on explicit interaction of cells. J. Comput. Sci. 16: 8-15 (2016) - [j75]Mohammad Hossein Moaiyeri
An Efficient Analog-to-Digital Converter Based on Carbon Nanotube FETs. J. Low Power Electron. 12(2): 150-157 (2016) - [j74]Mohammad Hossein Moaiyeri
Design and analysis of carbon nanotube FET based quaternary full adders. Frontiers Inf. Technol. Electron. Eng. 17(10): 1056-1066 (2016) - [j73]Atiyeh Panahi, Fazel Sharifi, Mohammad Hossein Moaiyeri
CNFET-based approximate ternary adders for energy-efficient image processing applications. Microprocess. Microsystems 47: 454-465 (2016) - [j72]Mahya Sam Daliri
Ternary cyclic redundancy check by a new hardware-friendly ternary operator. Microelectron. J. 54: 126-137 (2016) - [c22]Mona Moradi
Ternary Versus Binary Multiplication with Current-Mode CNTFET-Based K-Valued Converters. ISMVL 2016: 17-22 - [c21]Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini
Area-delay-power-aware adder placement method for RNS reverse converter design. LASCAS 2016: 223-226 - 2015
- [j71]Masoomeh Jasemi, Reza Faghih Mirzaee
Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple-valued logic and fuzzy logic. IET Circuits Devices Syst. 9(5): 343-352 (2015) - [j70]Shirin Rezaie, Reza Faghih Mirzaee
New dynamic ternary minimum and maximum circuits with reduced switching activity and without any additional voltage sources. Int. J. High Perform. Syst. Archit. 5(3): 153-165 (2015) - [j69]Somaye Mohammadyan, Shaahin Angizi
New fully single layer QCA full-adder cell based on feedback model. Int. J. High Perform. Syst. Archit. 5(4): 202-208 (2015) - [j68]Mohammad Hossein Moaiyeri
High-performance ternary logic gates for nanoelectronics. Int. J. High Perform. Syst. Archit. 5(4): 209-215 (2015) - [j67]Samira Sayedsalehi
Restoring and non-restoring array divider designs in Quantum-dot Cellular Automata. Inf. Sci. 311: 86-101 (2015) - [j66]Shaahin Angizi
Design and Verification of New n-Bit Quantum-Dot Synchronous Counters Using Majority Function-Based JK Flip-Flops. J. Circuits Syst. Comput. 24(10): 1550153:1-1550153:17 (2015) - [j65]Mona Moradi
New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources. J. Electr. Comput. Eng. 2015: 782089:1-782089:11 (2015) - [j64]Shaahin Angizi
An Ultra-High Speed and Low Complexity Quantum-Dot Cellular Automata Full Adder. J. Low Power Electron. 11(2): 173-180 (2015) - [j63]Shaahin Angizi
Designing quantum-dot cellular automata counters with energy consumption analysis. Microprocess. Microsystems 39(7): 512-520 (2015) - [j62]Shaahin Angizi
Design and evaluation of new majority gate-based RAM cell in quantum-dot cellular automata. Microelectron. J. 46(1): 43-51 (2015) - [j61]Fazel Sharifi, Mohammad Hossein Moaiyeri
Robust and energy-efficient carbon nanotube FET-based MVL gates: A novel design approach. Microelectron. J. 46(12): 1333-1342 (2015) - [c20]Mohammad Reza Jahangir
Designing Nanoelectronic-Compatible 8-bit Square Root Circuit by Quantum-Dot Cellular Automata. iNIS 2015: 23-28 - 2014
- [j60]Mariam Zomorodi Moghadam, Keivan Navi, Mahmood Kalemati:
A novel reversible design for double edge triggered flip-flops and new designs of reversible sequential circuits. Comput. Syst. Sci. Eng. 29(3) (2014) - [j59]Mohammad Reza Noorimehr, Mehdi Hosseinzadeh, Keivan Navi:
Efficient Reverse Converters for 4-Moduli Sets {22n-1-1, 2n, 2n+1, 2n-1} and {22n-1, 22n-1-1, 2n+1, 2n-1} Based on CRTs Algorithm. Circuits Syst. Signal Process. 33(10): 3145-3163 (2014) - [j58]Reza Faghih Mirzaee
Optimized Adder Cells for Ternary Ripple-Carry Addition. IEICE Trans. Inf. Syst. 97-D(9): 2312-2319 (2014) - [j57]Mohammad Esmaeildoust, Keivan Navi, Shirin Rezaei, Marzieh Gerami:
On the Design of RNS Bases for Modular Multiplication. Int. J. Netw. Secur. 16(2): 118-128 (2014) - [j56]Vahid Foroutan, MohammadReza Taheri, Keivan Navi, Arash Azizi Mazreah:
Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style. Integr. 47(1): 48-61 (2014) - [j55]Mojtaba Maleknejad, Reza Faghih Mirzaee
A Systematic Approach to Design Boolean Functions using CNFETs and an Array of CNFET capacitors. J. Circuits Syst. Comput. 23(3) (2014) - [j54]Moein Kianpour
A novel design of 8-bit adder/subtractor by quantum-dot cellular automata. J. Comput. Syst. Sci. 80(7): 1404-1414 (2014) - [j53]Shaahin Angizi
Novel Robust Single Layer Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with Quantum-Dot Cellular Automata. J. Low Power Electron. 10(2): 259-271 (2014) - [j52]Mariam Zomorodi Moghadam
Synthesis and Optimization by Quantum Circuit Description Language. Trans. Comput. Sci. 24: 74-91 (2014) - [j51]Reza Faghih Mirzaee
High-Efficient Circuits for Ternary Addition. VLSI Design 2014: 534587:1-534587:15 (2014) - [i5]Mehdi Masoudi, Milad Mazaheri, Aliakbar Rezaei, Keivan Navi:
Designing high-speed, low-power full adder cells based on carbon nanotube technology. CoRR abs/1411.2212 (2014) - 2013
- [j50]Mojtaba Maleknejad, Mehdi Ghasemi, Keivan Navi:
New CNTFET-Based Arithmetic Cells with Weighted Inputs for High Performance Energy Efficient Applications. IEICE Trans. Electron. 96-C(7): 1019-1027 (2013) - [j49]Mohsen M. Arjmand, Mohsen Soryani
Coplanar wire crossing in quantum cellular automata using a ternary cell. IET Circuits Devices Syst. 7(5): 263-272 (2013) - [j48]Mohammad Hossein Moaiyeri
A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits. IET Comput. Digit. Tech. 7(4): 167-181 (2013) - [j47]Shima Mehrabi, Reza Faghih Mirzaee
Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4 ≤ m ≤ 10) compressors. Int. J. High Perform. Syst. Archit. 4(4): 231-241 (2013) - [j46]Reza Faghih Mirzaee
Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic. Microelectron. J. 44(12): 1238-1250 (2013) - [j45]Mohammad A. Tehrani, Keivan Navi, Ali Kia-kojoori:
Multi-output majority gate-based design optimization by using evolutionary algorithm. Swarm Evol. Comput. 10: 25-30 (2013) - [j44]Mohammad Esmaeildoust
Efficient RNS Implementation of Elliptic Curve Point Multiplication Over ${\rm GF}(p)$. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1545-1549 (2013) - [c19]Reza Faghih Mirzaee
Dramatically Low-Transistor-Count High-Speed Ternary Adders. ISMVL 2013: 170-175 - [i4]Samira Shirinabadi Farahani, Ronak Zarhoun, Mohammad Hossein Moaiyeri, Keivan Navi:
An efficient cntfet-based 7-input minority gate. CoRR abs/1303.2175 (2013) - 2012
- [j43]Mohammad Hossein Moaiyeri
High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology. Circuits Syst. Signal Process. 31(2): 465-488 (2012) - [j42]Mohammad Hossein Moaiyeri
Design and Evaluation of CNFET-Based Quaternary Circuits. Circuits Syst. Signal Process. 31(5): 1631-1652 (2012) - [j41]Mohammad Esmaeildoust, Keivan Navi, MohammadReza Taheri, Amir Sabbagh Molahosseini
Efficient RNS to binary converters for the new 4-moduli set {2n, 2n+1-1, 2n-1, 2n-1-1}. IEICE Electron. Express 9(1): 1-7 (2012) - [j40]Mehdi Ghasemi, Mahya Sam
A new SPICE model for organic molecular transistors and a novel hybrid architecture. IEICE Electron. Express 9(10): 926-931 (2012) - [j39]Mohammad Reza Reshadinezhad
An Energy-Efficient Full Adder Cell Using CNFET Technology. IEICE Trans. Electron. 95-C(4): 744-751 (2012) - [j38]Mariam Zomorodi Moghadam
Ultra-area-efficient reversible multiplier. Microelectron. J. 43(6): 377-385 (2012) - [j37]Sara Hashemi, Keivan Navi:
New robust QCA D flip flop and memory structures. Microelectron. J. 43(12): 929-940 (2012) - [c18]Mohsen M. Arjmand, Mohsen Soryani
A Novel Ternary-to-Binary Converter in Quantum-Dot Cellular Automata. ISVLSI 2012: 147-152 - [i3]Mehdi Ghasemi, Mohammad Hossein Moaiyeri, Keivan Navi:
A New Full Adder Cell for Molecular Electronics. CoRR abs/1201.2043 (2012) - [i2]Mostafa Rahimi Azghadi, Omid Kavehei, Keivan Navi:
A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders. CoRR abs/1204.2048 (2012) - 2011
- [j36]Reza Moraveji, Hamid Sarbazi-Azad, Abbas Nayebi, Keivan Navi:
Modeling the effects of hot-spot traffic load on the performance of wormhole-switched hypermeshes. Comput. Electr. Eng. 37(1): 1-23 (2011) - [j35]Keivan Navi, Akbar Doostaregan, Mohammad Hossein Moaiyeri
A hardware-friendly arithmetic method and efficient implementations for designing digital fuzzy adders. Fuzzy Sets Syst. 185(1): 111-124 (2011) - [j34]Keivan Navi, Mohammad Esmaeildoust
A General Reverse Converter Architecture with Low Complexity and High Performance. IEICE Trans. Inf. Syst. 94-D(2): 264-273 (2011) - [j33]Mohammad Hossein Moaiyeri
Design of energy-efficient and robust ternary circuits for nanotechnology. IET Circuits Devices Syst. 5(4): 285-296 (2011) - [j32]Keivan Navi, Horialsadat Hossein Sajedi, Reza Faghih Mirzaee
High-speed full adder based on minority function and bridge style for nanoscale. Integr. 44(3): 155-162 (2011) - [j31]Reza Faghih Mirzaee
A New Robust and High-Performance Hybrid Full Adder Cell. J. Circuits Syst. Comput. 20(4): 641-655 (2011) - [j30]Mohammad Rashtian
A New Switched opamp Approach for Improving the Operation of Auto-Reset Switched-capacitor Filters. J. Circuits Syst. Comput. 20(5): 835-848 (2011) - [j29]Mohammad A. Tehrani, Farshad Safaei, Mohammad Hossein Moaiyeri
Design and implementation of Multistage Interconnection Networks using Quantum-dot Cellular Automata. Microelectron. J. 42(6): 913-922 (2011) - [j28]Ehsan Pour Ali Akbar
Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology. Microelectron. J. 42(8): 973-981 (2011) - [j27]Keivan Navi, Amir Sabbagh Molahosseini
How to Teach Residue Number System to Computer Scientists and Engineers. IEEE Trans. Educ. 54(1): 156-163 (2011) - 2010
- [j26]Mohammad Esmaeildoust, Keivan Navi, MohammadReza Taheri:
High speed reverse converter for new five-moduli set {2n, 22n+1-1, 2n/2-1, 2n/2+1, 2n+1}. IEICE Electron. Express 7(3): 118-125 (2010) - [j25]Keivan Navi, Fazel Sharifi, Amir Momeni, Peiman Keshavarzian:
Ultra High Speed CNFET Full-Adder Cell Based on Majority Gates. IEICE Trans. Electron. 93-C(6): 932-934 (2010) - [j24]Keivan Navi, Razieh Farazkish, Samira Sayedsalehi
A new quantum-dot cellular automata full-adder. Microelectron. J. 41(12): 820-826 (2010) - [j23]Amir Sabbagh Molahosseini
Efficient Reverse Converter Designs for the New 4-Moduli Sets 2n -1, 2n, 2n +1, 22n + 1-1 and 2n -1, 2n +1, 22n, 22n +1 Based on New CRTs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 823-835 (2010) - [j22]Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani:
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits. VLSI Design 2010: 264390:1-264390:17 (2010) - [c17]Somayyeh Jafarali Jassbi, Mehdi Hosseinzadeh, Keivan Navi:
Redundant Multi-Level one-hot Residue Number System based error correction codes. EWDTS 2010: 491-494 - [c16]Amir Sabbagh Molahosseini
A new four-modulus RNS to binary converter. ISCAS 2010: 4161-4164 - [c15]Amir Sabbagh Molahosseini
A Reverse Converter for the Enhanced Moduli Set {2n-1, 2n+1, 22n, 22n+1-1} Using CRT and MRC. ISVLSI 2010: 456-457
2000 – 2009
- 2009
- [j21]Somayeh Timarchi, Keivan Navi:
A new algorithm for determining all possible symmetric hybrid redundant numbers. IEICE Electron. Express 6(1): 8-13 (2009) - [j20]Peiman Keshavarzian, Keivan Navi:
Efficient Carbon Nanotube Galois Field Circuit Design. IEICE Electron. Express 6(9): 546-552 (2009) - [j19]Keivan Navi, Mehrdad Maeen, Omid Hashemipour:
An energy efficient full adder cell for low voltage. IEICE Electron. Express 6(9): 553-559 (2009) - [j18]Amir Sabbagh Molahosseini
A new five-moduli set for efficient hardware implementation of the reverse converter. IEICE Electron. Express 6(14): 1006-1012 (2009) - [j17]Mehrdad Maeen, Vahid Foroutan, Keivan Navi:
On the design of low power 1-bit full adder cell. IEICE Electron. Express 6(16): 1148-1154 (2009) - [j16]Keivan Navi, Amir Momeni, Fazel Sharifi, Peiman Keshavarzian:
Two novel ultra high speed carbon nanotube Full-Adder cells. IEICE Electron. Express 6(19): 1395-1401 (2009) - [j15]Amir Sabbagh Molahosseini
Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n -1, 2n+1 -1} and {22n, 2n -1, 2n-1 -1}. IEICE Trans. Inf. Syst. 92-D(9): 1628-1638 (2009) - [j14]Keivan Navi, Mehrdad Maeen, Vahid Foroutan, Somayeh Timarchi, Omid Kavehei
A novel low-power full-adder cell for low voltage. Integr. 42(4): 457-467 (2009) - [j13]Mohammad Hossein Moaiyeri
Two New Low-Power and High-Performance Full Adders. J. Comput. 4(2): 119-126 (2009) - [j12]Majid Haghparast
Optimized Reversible Multiplier Circuit. J. Circuits Syst. Comput. 18(2): 311-323 (2009) - [j11]Tooraj Nikoubin, Fatemeh Eslami, Amirali Baniasadi, Keivan Navi:
A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic. J. Low Power Electron. 5(4): 474-483 (2009) - [j10]Keivan Navi, Mohammad Hossein Moaiyeri
Two new low-power Full Adders based on majority-not gates. Microelectron. J. 40(1): 126-130 (2009) - [j9]Keivan Navi, Vahid Foroutan, Mostafa Rahimi Azghadi, Mehrdad Maeen, Maryam Ebrahimpour, M. Kaveh, Omid Kavehei
A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter. Microelectron. J. 40(10): 1441-1448 (2009) - [j8]Somayeh Timarchi, Keivan Navi:
Arithmetic Circuits of Redundant SUT-RNS. IEEE Trans. Instrum. Meas. 58(9): 2959-2968 (2009) - [c14]Somayeh Timarchi, Keivan Navi, Omid Kavehei
Maximally Redundant High-Radix Signed-Digit Adder: New Algorithm and Implementation. ISVLSI 2009: 97-102 - [i1]Arash Hariri, Keivan Navi, Reza Rastegar:
A High Dynamic Range 3-Moduli-Set with Efficient Reverse Converter. CoRR abs/0901.1123 (2009) - 2008
- [j7]Arash Hariri, Keivan Navi, Reza Rastegar:
A new high dynamic range moduli set with efficient reverse converter. Comput. Math. Appl. 55(4): 660-668 (2008) - [j6]Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini
An improved reverse converter for the moduli set {2n-1, 2n, 2n+1, 2n+1-1}. IEICE Electron. Express 5(17): 672-677 (2008) - [j5]Keivan Navi, Reza Faghih Mirzaee
Ultra high speed Full Adders. IEICE Electron. Express 5(18): 744-749 (2008) - [j4]Keivan Navi, Omid Kavehei
Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell. J. Comput. 3(2): 48-54 (2008) - [j3]Mehdi Hosseinzadeh, Midia Reshadi, Ahmad Khademzadeh, Keivan Navi:
Reliable and Secure Chip Level Communication by residue number System Code. Trans. SDPS 12(1): 13-22 (2008) - [j2]Amir Sabbagh Molahosseini
An efficient architecture for designing reverse converters based on a general three-moduli set. J. Syst. Archit. 54(10): 929-934 (2008) - [j1]Aminollah Mahabadi, Hamid Sarbazi-Azad, Ebrahim Khodaie
Parallel Lagrange interpolation on k -ary n -cubes with maximum channel utilization. J. Supercomput. 46(1): 1-14 (2008) - [c13]Nasim Kazemifard, Maryam Ebrahimpour, Mostafa Rahimi Azghadi, Mohammad A. Tehrani, Keivan Navi:
Performance evaluation of In-Circuit Testing on QCA based circuits. EWDTS 2008: 375-378 - [c12]Omid Kavehei
Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design. ISVLSI 2008: 10-15 - 2007
- [c11]Mahnoush Rouholamini, Omid Kavehei
A New Design for 7: 2 Compressors. AICCSA 2007: 474-478 - [c10]Reza Moraveji, Hamid Sarbazi-Azad, Abbas Nayebi, Keivan Navi:
Performance Modeling of Wormhole Hypermeshes Under Hotspot Traffic. CSR 2007: 290-302 - [c9]Keivan Navi, Omid Kavehei
A Novel CMOS Full Adder. VLSI Design 2007: 303-307 - 2006
- [c8]Sara Sharifi Sedeh, Reza Sharifi Sedeh, Keivan Navi:
Reducing Harmful Effects Of Road Excitations On Human Health By Designing Car Active Suspension Systems. BIOCOMP 2006: 236-241 - [c7]Reza Sharifi Sedeh, Sara Sharifi Sedeh, Keivan Navi:
Using Car Semi-Active Suspension Systems To Decrease Undesirable Effects Of Road Excitations On Human Health. BIOCOMP 2006: 242-250 - 2005
- [c6]Arash Hariri, Reza Rastegar, Keivan Navi, Morteza Saheb Zamani
Cellular Learning Automata based Evolutionary Computing (CLA-EC) for Intrinsic Hardware Evolution. Evolvable Hardware 2005: 294-297
1990 – 1999
- 1995
- [c5]Keivan Navi, Daniel Etiemble:
From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators. ISMVL 1995: 58-63 - 1994
- [c4]A. Kazeminejad, Keivan Navi, Daniel Etiemble:
CML Current Mode Full Adders for 2.5-V Power Supply. ISMVL 1994: 10-14 - [c3]Keivan Navi, A. Kazeminejad, Daniel Etiemble:
Performance of CMOS Current Mode Full Adders. ISMVL 1994: 27-34 - 1993
- [c2]Daniel Etiemble, Keivan Navi:
Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system. IEEE Symposium on Computer Arithmetic 1993: 194-201 - [c1]Daniel Etiemble, Keivan Navi:
A Basis for the Comparison of Binary and m-Valued Current Mode Circuits: the Multioperand Addition with Redundant Number Systems. ISMVL 1993: 216-221
Coauthor Index
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