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Chih-Chyau Yang
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2020 – today
- 2024
- [j7]Chih-Chyau Yang, Tian-Sheuan Chang:
A 71.2-μW Speech Recognition Accelerator With Recurrent Spiking Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 71(7): 3203-3213 (2024) - [c34]Chun-Ming Huang, Wei-Lin Lai, Chih-Chyau Yang, Yi-Jie Hsieh, Chien-Ming Wu, Chu-Hui Lee:
LSvT: EEG Channel Localization and Selection via Training for BCI Applications. IJCNN 2024: 1-6 - 2023
- [j6]Chih-Chyau Yang, Tian-Sheuan Chang:
A 1.6-mW Sparse Deep Learning Accelerator for Speech Separation. IEEE Trans. Very Large Scale Integr. Syst. 31(3): 310-319 (2023) - [c33]Chih-Chyau Yang, Chun-Yu Chen, Fu-Chen Cheng, Tsung-Jen Hsieh, Chien-Ming Wu, Chun-Ming Huang:
DLA-SP: A System Platform for Deep-Learning Accelerator Integration. IECON 2023: 1-4 - [c32]Chih-Chyau Yang, Chih-Ting Kuo, Ssu-Ying Chen, Hao-Wu Liu, Fu-Chen Cheng, Yi-Jie Hsieh, Jin-Ju Chue, Chien-Ming Wu, Chun-Ming Huang:
AI-EMS: An Environmental Monitoring System with AI Prediction. SENSORS 2023: 1-4 - [i3]Chih-Chyau Yang, Tian-Sheuan Chang:
A 1.6-mW Sparse Deep Learning Accelerator for Speech Separation. CoRR abs/2312.09580 (2023) - 2022
- [j5]Kuo-Wei Chang, Hsu-Tung Shih, Tian-Sheuan Chang, Shang-Hong Tsai, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A Real-Time 1280 × 720 Object Detection Chip With 585 MB/s Memory Traffic. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 816-825 (2022) - [c31]Chun-Ming Huang, Fu-Cheng Cheng, Jin-Ju Chue, Wei-Lin Lai, Yi-Jie Hsieh, Chih-Chyau Yang, Chien-Ming Wu:
vMic: A Surface Vibration Microphone. IEEE SENSORS 2022: 1-4 - [c30]Ssu-Ying Chen, Yi-Jie Hsieh, Hsiao-Ju Lo, Fu-Chen Cheng, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
SenCu as a Sensing System to Experience Programming Design. TALE 2022: 99-104 - [i2]Kuo-Wei Chang, Hsu-Tung Shih, Tian-Sheuan Chang, Shang-Hong Tsai, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A Real Time 1280x720 Object Detection Chip With 585MB/s Memory Traffic. CoRR abs/2205.01571 (2022) - [i1]Chih-Chyau Yang, Tian-Sheuan Chang:
Pre-RTL DNN Hardware Evaluator With Fused Layer Support. CoRR abs/2205.01729 (2022) - 2021
- [c29]Chih-Chyau Yang, Tian-Sheuan Chang:
Pre-RTL DNN Hardware Evaluator With Fused Layer Support. ISOCC 2021: 83-84 - 2020
- [c28]Ssu-Ying Chen, Chih-Chyau Yang, Fu-Cheng Cheng, Yu-An Kuo, Jin-Ju Chue, Chen-Chia Chen, Chien-Ming Wu, Chun-Ming Huang:
Live Demonstration: SenCu - A Power-Efficient Sensor System. IEEE SENSORS 2020: 1 - [c27]Chih-Chyau Yang, Yi-Jie Hsieh, Wei-Lin Lai, Chun-Yu Chen, Jin-Ju Chue, Chien-Ming Wu, Chun-Ming Huang:
A Portable Power-efficient PM2.5 Sensor System. IEEE SENSORS 2020: 1-4
2010 – 2019
- 2019
- [c26]Chih-Chyau Yang, Yi-Jie Hsieh, Chun-Wen Cheng, Wei-Lin Lai, Chien-Ming Wu, Chun-Ming Huang:
Live Demonstration: A Plug-and-Sense Smart Sensor System. IEEE SENSORS 2019: 1 - [c25]Chun-Ming Huang, Chih-Chyau Yang, Yi-Jie Hsieh, Chun-Wen Cheng, Yi-Jun Liu, Jia-Rong Chang, Yu-Tsang Chang, Chien-Ming Wu:
A Smart Sensor Development Platform and Its System Demonstration. ISCAS 2019: 1-4 - 2018
- [j4]Yi-Bing Lin, Chun-Ming Huang, Li-Kuan Chen, Gang-Neng Sung, Chih-Chyau Yang:
MorSocket: An Expandable IoT-Based Smart Socket System. IEEE Access 6: 53123-53132 (2018) - 2017
- [c24]Chun-Ming Huang, Yi-Jie Hsieh, Wei-Lin Lai, Yi-Jun Liu, Chun-Ying Juan, Ssu-Ying Chen, Chun-Yu Chen, Jin-Ju Chue, Chih-Chyau Yang, Chien-Ming Wu:
A modular wireless sensor platform and its applications. ISCAS 2017: 1-4 - 2016
- [c23]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Wen Cheng, Chun-Yu Chen, Yi-Jun Liu:
Live demonstration: MorFPGA duo platform with dual-camera support. APCCAS 2016: 738-739 - [c22]Ssu-Ying Chen, Yi-Jie Hsieh, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A real-time bridge scour sensor system with accelerometers. I2MTC 2016: 1-6 - [c21]Chih-Chyau Yang, Ssu-Ying Chen, Yi-Jie Hsieh, Fu-Chen Cheng, Yu-Cheng Huang, Jin-Ju Chue, Chih-Ting Kuo, Chien-Ming Wu, Chun-Ming Huang:
A rugged sensor system for real-time bridge safety monitoring in Taiwan. SAS 2016: 1-5 - 2015
- [j3]Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A Cost-Effective 3D SoC Silicon Prototyping Platform. J. Inf. Sci. Eng. 31(6): 1885-1901 (2015) - [c20]Chen-Chia Chen, Yi-Jun Liu, Gang-Neng Sung, Chih-Chyau Yang, Chieh-Ming Wu, Chun-Ming Huang:
Smart electronic dose counter for pressurized metered dose inhaler. BioCAS 2015: 1 - [c19]Chen-Chia Chen, Yi-Jun Liu, Shao-Min Wen, Chih-Chyau Yang, Jin-Ju Chue, Chieh-Ming Wu, Chun-Ming Huang:
Low-cost electronic dose counter for pressurized metered dose inhaler. ICCE-TW 2015: 400-401 - [c18]Chen-Chia Chen, Chih-Chyau Yang, Ssu-Ying Chen, Wen-Ching Chen, Gang-Neng Sung, Chih-Ting Kuo, Jin-Ju Chue, Chieh-Ming Wu, Chun-Ming Huang:
Low-cost hall-effect sensors for real-time monitoring pier scour. ISSNIP 2015: 1-2 - [c17]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Ting Kuo, Gang-Neng Sung, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang:
A real-time bridge structural health monitoring device using cost-effective one-axis accelerometers. ISSNIP 2015: 1-2 - 2014
- [c16]Chih-Chyau Yang, Yi-Jun Liu, Chien-Ming Wu, Chun-Ming Huang:
Live demonstration: A 3D die-level integration platform. APCCAS 2014: 179-180 - [c15]Chih-Hsing Lin, Ssu-Ying Chen, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang, Chih-Ting Kuo, Yu-Da Huang:
Structural health monitoring of bridges using cost-effective 1-axis accelerometers. SAS 2014: 24-27 - 2013
- [c14]Chun-Chieh Chiu, Chih-Hsing Lin, Chih-Chyau Yang, Yi-Jun Liu, Ssu-Ying Chen, Jin-Ju Chue, Chih-Ting Kuo, Gang-Neng Sung, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang:
Morpack Cube: A portable 3D heterogeneous system integration platform. SoCC 2013: 197-202 - 2012
- [c13]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen:
A modularized 3D heterogeneous system integration platform. APCCAS 2012: 396-399 - [c12]Chen-Chia Chen, Shih-Hsun Hsu, Chen-Hsiang Sang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang, Jeng-Tzong Sheu:
Multi-layer planar micro-coils chip as actuators and heaters for biological applications. BioCAS 2012: 392-395 - [c11]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chih-Hsing Lin, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Chun-Ping Lin, Wei-De Chien:
Boundary scan test solution for MorPACK platform. ISPACS 2012: 802-805 - [c10]Yi-Jun Liu, Chih-Chyau Yang, Chih-Hsing Lin, Chun-Chieh Chiu, Chun-Chieh Chu, Chien-Ming Wu, Chun-Ming Huang:
Microphone array application prototyping with MorPACK heterogeneous integrated system. SII 2012: 734-739 - [c9]Chun-Ming Huang, Chih-Chyau Yang, Chien-Ming Wu, Chun-Chieh Chiu, Yi-Jun Liu, Chun-Chieh Chu, Nien-Hsiang Chang, Wen-Ching Chen, Chih-Hsing Lin, Hua-Hsin Luo:
A novel design flow for a 3D heterogeneous system prototyping platform. SoCC 2012: 78-82 - [c8]Yi-Jun Liu, Chih-Chyau Yang, Shih-Lun Chen, Chun-Chieh Chiu, Chien-Ming Wu, Chun-Ming Huang:
An efficient memory controller for 3D heterogeneous integration platform. VLSI-DAT 2012: 1-4 - 2011
- [j2]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Kuen-Jong Lee, Chin-Long Wey:
Programmable System-on-Chip for Silicon Prototyping. IEEE Trans. Ind. Electron. 58(3): 830-838 (2011) - [c7]Chih-Chyau Yang, Nien-Hsiang Chang, Shih-Lun Chen, Wei-De Chien, Chi-Shi Chen, Chien-Ming Wu, Chun-Ming Huang:
A novel methodology for Multi-Project System-on-a-Chip. SoCC 2011: 308-311 - 2010
- [c6]Chih-Hsing Lin, Yung-Chang Chang, Wen-Chih Huang, Wei-Chih Lai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Chun-Ming Huang, Chih-Chyau Yang, Shih-Lun Chen:
A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification. ISCAS 2010: 1061-1064
2000 – 2009
- 2009
- [c5]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Wei-De Chien, Shih-Lun Chen, Chi-Shi Chen, Jiann-Jenn Wang, Chin-Long Wey:
Implementation and Prototyping of a Complex Multi-project System-on-a-chip. ISCAS 2009: 2321-2324 - 2008
- [c4]Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Chin-Long Wey:
PrSoC: Programmable System-on-chip (SoC) for silicon prototyping. ISCAS 2008: 3382-3385 - 2006
- [c3]Chun-Ming Huang, Kuen-Jong Lee, Chih-Chyau Yang, Wen-Hsiang Hu, Shi-Shen Wang, Jeng-Bin Chen, Chi-Shi Chen, Lan-Da Van, Chien-Ming Wu, Wei-Chang Tsai, Jing-Yang Jou:
Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping. SoCC 2006: 137-140 - 2005
- [j1]Lan-Da Van, Chih-Chyau Yang:
Generalized Low-Error Area-Efficient Fixed-Width Multipliers. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(8): 1608-1619 (2005) - [c2]Min-An Song, Lan-Da Van, Chih-Chyau Yang, Shih-Chieh Chiu, Sy-Yen Kuo:
A framework for the design of error-aware power-efficient fixed-width Booth multipliers. ISCAS (1) 2005: 81-84 - 2004
- [c1]Lan-Da Van, Chih-Chyau Yang:
High-speed area-efficient recursive DFT/IDFT architectures. ISCAS (3) 2004: 357-360
Coauthor Index
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last updated on 2024-09-21 01:47 CEST by the dblp team
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