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Sooryeong Lee
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2020 – today
- 2024
- [j4]Hayoung Lee
, Sooryeong Lee, Sungho Kang
A New Fail Address Memory Architecture for Cost-Effective ATE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1260-1273 (2024) - [j3]Juyong Lee
A New ISA for High-Speed and Area-Efficient ALPG. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3358-3362 (2024) - [j2]Hayoung Lee
RA-Aware Fail Data Collection Architecture for Cost Reduction. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1136-1149 (2024) - 2023
- [j1]Youngkwang Lee
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 308-321 (2023) - 2022
- [c5]Seung Ho Shin
An Improved Early Termination Methodology Using Convolutional Neural Network. ISOCC 2022: 21-22 - [c4]Sooryeong Lee, Hayoung Lee
PROG: Per-Row Output Generator for BOST. ISOCC 2022: 23-24 - [c3]Hayoung Lee
FAME: Fault Address Memory Structure for Repair Time Reduction. ISOCC 2022: 31-32 - 2021
- [c2]Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang:
A Circular-based TSV Repair Architecture. ISOCC 2021: 1-2 - [c1]Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang:
Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC. ISOCC 2021: 101-102
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