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Enrico Martinelli
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2010 – 2019
- 2013
- [c11]Sandro Bartolini, Luca Lusnig, Enrico Martinelli:
Olympic: A Hierarchical All-Optical Photonic Network for Low-Power Chip Multiprocessors. DSD 2013: 56-59 - 2011
- [j20]Giuseppe Alia, Enrico Martinelli:
A high performance ROM-based structure for modular exponentiation. Comput. Electr. Eng. 37(3): 275-284 (2011)
2000 – 2009
- 2009
- [p1]Sandro Bartolini, Roberto Giorgi, Enrico Martinelli:
Instruction Set Extensions for Cryptographic Applications. Cryptographic Engineering 2009: 191-233 - 2008
- [j19]Sandro Bartolini, Irina Branovic, Roberto Giorgi
, Enrico Martinelli:
Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2m). IEEE Trans. Computers 57(5): 672-685 (2008) - 2007
- [c10]Sandro Bartolini, Cinzia Castagnini, Enrico Martinelli:
Inclusion of a Montgomery Multiplier Unit into an Embedded Processor's Datapath to Speed-up Elliptic Curve Cryptography. IAS 2007: 95-100 - 2005
- [j18]Giuseppe Alia, Enrico Martinelli:
NEUROM: a ROM based RNS digital neuron. Neural Networks 18(2): 179-189 (2005) - 2004
- [j17]Irina Branovic, Roberto Giorgi, Enrico Martinelli:
A workload characterization of elliptic curve cryptography methods in embedded environments. SIGARCH Comput. Archit. News 32(3): 27-34 (2004) - [c9]Sandro Bartolini, Irina Branovic, Roberto Giorgi
A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields. SBAC-PAD 2004: 238-245 - [c8]Irina Branovic, Roberto Giorgi, Enrico Martinelli:
WebMIPS: a new web-based MIPS simulation environment for computer architecture education. WCAE 2004: 19 - 2003
- [j16]Claudia Fiorini, Enrico Martinelli, Fabio Massacci
How to fake an RSA signature by encoding modular root finding as a SAT problem. Discret. Appl. Math. 130(2): 101-127 (2003) - 2002
- [j15]Giuseppe Alia, Enrico Martinelli:
Fast modular exponentiation of large numbers with large exponents. J. Syst. Archit. 47(14-15): 1079-1088 (2002) - 2001
- [j14]Michelangelo Diligenti, Marco Gori, Marco Maggini, Enrico Martinelli:
Adaptive graphical pattern recognition for the classification of company logos. Pattern Recognit. 34(10): 2049-2061 (2001) - 2000
- [c7]Marco Gori, Marco Maggini, Enrico Martinelli, Franco Scarselli:
Learning User Profiles in NAUTILUS. AH 2000: 323-326
1990 – 1999
- 1999
- [c6]Ciro de Mauro, Marco Gori, Marco Maggini, Enrico Martinelli:
A Voice Device with an Application-Adapted Protocol for Microsoft Windows. ICMCS, Vol. 2 1999: 1015-1016 - 1998
- [j13]Giuseppe Alia, Enrico Martinelli:
Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid. Comput. J. 41(1): 45-51 (1998) - [j12]Giuseppe Alia, Enrico Martinelli:
Sign detection in residue arithmetic units. J. Syst. Archit. 45(3): 251-258 (1998) - [j11]Marco Gori, Marco Maggini, Enrico Martinelli, Giovanni Soda:
Inductive inference from noisy examples using the hybrid finite state filter. IEEE Trans. Neural Networks 9(3): 571-575 (1998) - 1997
- [c5]Paolo Frasconi, Marco Gori, Marco Maggini, Enrico Martinelli, Giovanni Soda:
Inductive Inference of Tree Automata by Recursive Neural Networks. AI*IA 1997: 36-47 - 1995
- [j10]Francesco Gardin, Richard Power, Enrico Martinelli:
Liquidity management with fuzzy qualitative constraints. Decis. Support Syst. 15(2): 147-156 (1995) - 1993
- [j9]Giuseppe Alia, Enrico Martinelli:
On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation. IEEE Trans. Computers 42(8): 962-967 (1993) - 1991
- [j8]Ferruccio Barsi, Enrico Martinelli:
A VLSI architecture for RNS with MI adders. Integr. 11(1): 67-83 (1991) - [j7]Giuseppe Alia, Enrico Martinelli:
A VLSI Modulo m Multiplier. IEEE Trans. Computers 40(7): 873-878 (1991) - 1990
- [j6]Giuseppe Alia, Enrico Martinelli:
VLSI Binary-Residue Converters for Pipelined Processing. Comput. J. 33(5): 473-475 (1990) - [j5]Giuseppe Alia, Enrico Martinelli:
A VLSI structure forX(modm) operation. J. VLSI Signal Process. 1(4): 257-264 (1990)
1980 – 1989
- 1986
- [j4]Giuseppe Alia, Enrico Martinelli, N. Tani:
Fast hardware graphic generators of curve families. Comput. Graph. 10(1): 27-36 (1986) - 1985
- [c4]Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli, N. Tani:
Table Look-up Graphic Interpolation. Eurographics 1985 - 1984
- [j3]Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli:
A fast near optimum VLSI implementation of FFT using residue number systems. Integr. 2(2): 133-147 (1984) - [j2]Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli:
A Fast VLSI Conversion Between Binary and Residue Systems. Inf. Process. Lett. 18(3): 141-145 (1984) - [c3]Giuseppe Alia, Enrico Martinelli, N. Tani:
An Approach to the Design of Hardware Curve Generators for Graphic Displays. Eurographics 1984 - 1982
- [j1]Giuseppe Alia, Enrico Martinelli:
On switching network functionalities and their relationships. Int. J. Parallel Program. 11(2): 123-138 (1982)
1970 – 1979
- 1978
- [c2]Giuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini:
LSI components modelling in a three-valued functional simulation. DAC 1978: 428-438 - 1976
- [c1]Giuseppe Iazeolla, Enrico Martinelli, Orazio Tedone:
Production and representation of computer system simulation models. ANSS 1976: 205-212
Coauthor Index
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