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Shau-Yin Tseng
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2020 – today
- 2020
- [c40]Shau-Yin Tseng, Jian-Wei Chen:
Maskless lithography laser source target light dose reversed mapping. ICS 2020: 330-334 - [c39]Shau-Yin Tseng, Jin-Nan Liu, Jian-Wei Chen:
Nonlinear PCB Compensation Based on Intel® HD graphics for Manufacturing Processing. ICS 2020: 335-340
2010 – 2019
- 2018
- [i1]Tung-Cheng Wu, Shau-Yin Tseng, Chin-Feng Lai, Chia-Yu Ho, Ying-Hsun Lai:
Navigating Assistance System for Quadcopter with Deep Reinforcement Learning. CoRR abs/1811.04584 (2018) - 2017
- [c38]Che-Wei Tsao, Yuan-Hao Chang
, Tei-Wei Kuo
Distillation: A light-weight data separation design to boost performance of NVDIMM main memory. RTCSA 2017: 1-7 - 2015
- [c37]Kuei-Chun Liu, Ching-Hung Wu, Shau-Yin Tseng, Yin-Te Tsai:
Voice Helper: A Mobile Assistive System for Visually Impaired Persons. CIT/IUCC/DASC/PICom 2015: 1400-1405 - 2014
- [j3]Chien-Wei Chen, Yi-Ta Wu, Shau-Yin Tseng, Wen-Shan Wang:
Parallelization of Connected-Component Labeling on TILE64 Many-Core Platform. J. Signal Process. Syst. 75(2): 169-183 (2014) - [c36]Li-Wei Kuo, Chun-Chieh Yang, Jenq Kuen Lee, Shau-Yin Tseng:
The design of LLVM-based shader compiler for embedded architecture. ICPADS 2014: 961-968 - 2012
- [c35]Yi-Hao Chang, Chi-Tsai Yeh, Ing-Jer Huang, Shau-Yin Tseng:
A performance monitoring tool suite for 3D graphics SoC application. APCCAS 2012: 444-447 - 2011
- [j2]Jia-Ming Chen, Chun-Nan Liu, Jen-Kuei Yang, Shau-Yin Tseng, Wei-Kuan Shih, An-Yeu Wu
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part II: Application Programming. J. Signal Process. Syst. 62(3): 383-402 (2011) - [c34]Wei-Ting Cho, Chin-Feng Lai
A TV program-oriented user generated content service with seamless video reconstruction ranking in cloud networks. GLOBECOM Workshops 2011: 29-33 - [c33]Jen-Chieh Yeh, Kung-Ming Ji, Shing-Wu Tung, Shau-Yin Tseng:
Heterogeneous Multi-core SoC Implementation with System-Level Design Methodology. HPCC 2011: 851-856 - [c32]Chia-Hui Kao, Chung-Ta King, Shau-Yin Tseng:
Energy-Aware Depth Map Generation for 3D Portrait on Android Systems. ICPADS 2011: 959-964 - [c31]Xuan-Yi Lin, Kuan-Chou Lai, Shau-Yin Tseng, Kuan-Ching Li
An Efficient Programming Paradigm for Shared-Memory Master-Worker Video Decoding on TILE64 Many-Core Platform. ICPP 2011: 414-423 - [c30]Ang-Chih Hsieh, Yi-Ta Wu, Shau-Yin Tseng, TingTing Hwang:
Memory Mapping and Task Scheduling Techniques for Computation Models of Image Processing on Many-Core Platforms. ICPP 2011: 552-561 - [c29]Yi-Ta Wu, Yih-Tyng Wu, Chao-Yi Cho, Shau-Yin Tseng, Chun-Nan Liu, Chung-Ta King:
Parallel Integral Image Generation Algorithm on Multi-core System. ISPA 2011: 31-35 - [c28]Yi-Ta Wu, Yih-Tyng Wu, Shau-Yin Tseng, Chao-Yi Cho:
An Impulse Noise Removal Algorithm by Considering Region-Wise Property for Color Image. ISPA 2011: 36-40 - [c27]Yoshi Shih-Chieh Huang, Huan-Yu Liu, Yuan-Ying Chang, Chung-Ta King, Shau-Yin Tseng:
Floodgate: application-driven flow control in network-on-chip for many-core architectures. NoCArc@MICRO 2011: 5-10 - [c26]Ching-Lung Su, Kang-Ning Pang, Tse-Min Chen, Guo-Syuan Wu, Chia-Ling Chiang, Hang-Rnei Wen, Lung-Sheng Huang, Ya-Hsin Hsueh, Shau-Yin Tseng:
A Real-time Full-HD 2D-to-3D Conversion System Using Multicore Technology. MUE 2011: 273-276 - 2010
- [c25]Shau-Yin Tseng, Kuo-Hung Lin, Wen-Shan Wang, Chung-Ta King, Shih-Hsueh Chang:
Performance and Power Consumption Analysis of DVFS-Enabled H.264 Decoder on Heterogeneous Multi-Core Platform. CIT 2010: 1758-1763 - [c24]I-Hsien Lee, Shau-Yin Tseng, Nirmal K. Bose:
Super-resolution video reconstruction based on both local and global information. CCECE 2010: 1-4 - [c23]Yoshi Shih-Chieh Huang, Kaven Chun-Kai Chou, Chung-Ta King, Shau-Yin Tseng:
NTPT: on the end-to-end traffic prediction in the on-chip networks. DAC 2010: 449-452 - [c22]Wen-Chien Su, Jen-Kuei Yang, Kuei-Chun Liu, Shau-Yin Tseng, Wen-Shan Wang:
Waiting cycle analysis on H.246 decoder run in PAC Duo platform. ICASSP 2010: 922-925 - [c21]Pin Wu, Jun-Wei Hsieh, Jiun-Cheng Cheng, Shyi-Chyi Cheng, Shau-Yin Tseng:
Human Smoking Event Detection Using Visual Interaction Clues. ICPR 2010: 4344-4347 - [c20]Xuan-Yi Lin, Chung-Yu Huang, Pei-Man Yang, Tai-Wen Lung, Shau-Yin Tseng, Yeh-Ching Chung:
Parallelization of Motion JPEG Decoder on TILE64 Many-Core Platform. MTPP 2010: 59-68
2000 – 2009
- 2009
- [c19]Shyue-Wen Yang, Ming-Hwa Sheu, Jun-Jie Lin, Chuang-Chun Hu, Tzu-Hsiung Chen, Shau-Yin Tseng:
Parallel 3-Pixel Labeling Method and its Hardware Architecture Design. IAS 2009: 185-188 - [c18]Wen-Shan Wang, Ya-Fei Hung, Jen-Kuei Yang, Shau-Yin Tseng:
The Dynamic Decision Switch for Multiple Pixel Connected Component Labeling Algorithm. DICTA 2009: 140-145 - [c17]Ming-Wei Chang, Shau-Yin Tseng, Homn Lin, Ching-Lung Su:
Implementation and Optimization of DSP Suspend Resume on Dual-Core SOC. ICESS 2009: 185-190 - [c16]Po-Hui Chen, Chung-Ta King, Yuan-Ying Chang, Shau-Yin Tseng:
Multiprocessor System-on-Chip Profiling Architecture: Design and Implementation. ICPADS 2009: 519-526 - [c15]Wen-Kai Tsai, Ming-Hwa Sheu, Ching-Lung Su, Jun-Jie Lin, Shau-Yin Tseng:
Image Object Detection and Tracking Implementation for Outdoor Scenes on an Embedded Soc Platform. IIH-MSP 2009: 386-389 - [c14]Zhe-Mao Hsu, I-Yao Chuang, Wen-Chien Su, Jen-Chieh Yeh, Jen-Kuei Yang, Shau-Yin Tseng:
System Performance Analyses on PAC Duo ESL Virtual Platform. IIH-MSP 2009: 406-409 - [c13]Pei-Man Yang, Jen-Kuei Yang, Wen-Shan Wang, Shau-Yin Tseng:
Fast JPEG Huffman Table Restoring and Decoding for Embedded DSP Implementations. ISM 2009: 118-123 - [c12]Ya-Fei Hung, Shau-Yin Tseng, Chung-Ta King, Huan-Yu Liu, Yoshi Shih-Chieh Huang:
Parallel Implementation and Performance Prediction of Object Detection in Videos on the Tilera Many-Core Systems. ISPAN 2009: 563-567 - 2007
- [c11]Chia-Hao Yu, Chung-Kai Liu, Chih-Heng Kang, Tsun-Hsien Wang, Chih-Chien Shen, Shau-Yin Tseng:
An Efficient DMA Controller for Multimedia Application in MPU Based SOC. ICME 2007: 80-83 - [c10]Tien-Yan Ma, Ting-Wei Hou, Shau-Yin Tseng:
Hierarchical Key Management of Scalable Video Coding. IIH-MSP 2007: 399-402 - [c9]Jian-Jia Chen
Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 249-258 - [c8]Jia-Ming Chen, Chiu-Ling Chen, Jian-Liang Luo, Po-Wen Cheng, Chia-Hao Yu, Shau-Yin Tseng, Wei-Kuan Shih:
Realization and Optimization of H.264 Decoder for Dual-Core SoC. SIGMAP 2007: 309-316 - 2006
- [c7]Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao-Chang Yang, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng:
A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC. APCCAS 2006: 398-401 - [c6]Ching-Lung Su, Wei-Sen Yang, Ya-Li Chen, Yao Li, Ching-Wen Chen, Jiun-In Guo, Shau-Yin Tseng:
Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC. APCCAS 2006: 578-581 - [c5]Jia-Ming Chen, Chih-Hao Chang, Shau-Yin Tseng, Jenq Kuen Lee, Wei-Kuan Shih:
Power Aware H.264/AVC Video Player on PAC Dual-Core SoC Platform. EUC 2006: 57-68 - [c4]David Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, Chein-Wei Jen:
PAC DSP Core and Application Processors. ICME 2006: 289-292 - [c3]Shau-Yin Tseng, Tien-Wei Hsieh:
A Pattern-Search Method for H.264/AVC CAVLC Decoding. ICME 2006: 1073-1076 - 2005
- [c2]Chih-Chung Lu, Shau-Yin Tseng, Szu-Kai Huang:
A Secure Modular Exponential Algorithm Resists to Power, Timing, C Safe Error and M Safe Error Attacks. AINA 2005: 151-154 - 2002
- [c1]Chih-Chung Lu, Shau-Yin Tseng:
Integrated Design of AES (Advanced Encryption Standard) Encrypter and Decrypter. ASAP 2002: 277-285
1990 – 1999
- 1997
- [j1]Shau-Yin Tseng, Chung-Ta King, Chung Yi Tang:
Finding the Maximum Grid Convex Polygon for a Convex Region on the Plane. Inf. Sci. 98(1-4): 27-42 (1997)
Coauthor Index
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