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Philippe Jansen
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2010 – 2019
- 2015
- [c7]Philippe Jansen, Ramnath Venkatraman:
Session 20 - Manufacturing beyond moore's law. CICC 2015: 1
2000 – 2009
- 2009
- [j4]Kurt Ronse, Philippe Jansen, Roel Gronheid, Eric Hendrickx, Mireille Maenhoudt, Vincent Wiaux, Mieke Goethals, R. Jonckheere, Geert Vandenberghe:
Lithography Options for the 32 nm Half Pitch Node and Beyond. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1884-1891 (2009) - [c6]Philippe Jansen, David A. Sunderland:
Process integration and manufacturing issues. CICC 2009 - 2008
- [c5]Rich Liu, Philippe Jansen:
Session 6 - Advanced SoC/SiP integration & co-design. CICC 2008 - [c4]Steven Thijs, Mototsugu Okushima, Jonathan Borremans, Philippe Jansen, Dimitri Linten, Mirko Scholz, Piet Wambacq, Guido Groeseneken:
Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications. CICC 2008: 49-52 - [c3]Kurt Ronse, Philippe Jansen, Roel Gronheid, Eric Hendrickx, Mireille Maenhoudt, Mieke Goethals, Geert Vandenberghe:
Lithography options for the 32nm half pitch node and beyond. CICC 2008: 371-378 - 2005
- [j3]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, Guido Groeseneken, Marcel ter Beek:
ESD circuit model based protection network optimisation for extended-voltage NMOS drivers. Microelectron. Reliab. 45(9-11): 1430-1435 (2005) - [c2]Philippe Jansen, Steven Thijs, Dimitri Linten, M. I. Natarajan, Vesselin K. Vassilev, Mingxu Liu, Ann Concannon, David Trémouilles, Takeshi Nakaie, Masanori Sawada, Vladislav A. Vashchenko, Marcel ter Beek, Takumi Hasebe, Stefaan Decoutere, Guido Groeseneken:
RF ESD protection strategies - the design and performance trade-off challenges. CICC 2005: 489-496 - [c1]Philippe Jansen, Larry Starr:
CMOS scaling and three-dimensional silicon integration. CICC 2005: 652-653 - 2004
- [j2]Vesselin K. Vassilev, Vladislav A. Vashchenko, Philippe Jansen, B.-J. Choi, Ann Concannon, J.-J. Yang, Guido Groeseneken, M. I. Natarajan, Marcel ter Beek, Peter Hopper, Michiel Steyaert, Herman E. Maes:
A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits. Microelectron. Reliab. 44(9-11): 1885-1890 (2004)
1990 – 1999
- 1990
- [j1]Philippe Jansen, N. Maene, Walter De Raedt, S. Naten, D. Stubbe, Wim Schoenmaker, M. Van Rossum, Kristin M. De Meyer:
AlGaAs/GaAs: High electron mobility transistor simulations with PRISM. Eur. Trans. Telecommun. 1(4): 433-437 (1990)
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