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Shouli Yan
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2010 – 2019
- 2014
- [c19]Arindam Sanyal, Kareem Ragab, Long Chen, T. R. Viswanathan, Shouli Yan, Nan Sun:
A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping. CICC 2014: 1-4 - 2012
- [j10]Michael D. Bryant, Shouli Yan, Robin M. Tsang, Benito Fernandez, K. Kiran Kumar:
A Mixed Signal (Analog-Digital) Integrator Design. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(7): 1409-1417 (2012) - [c18]Joseph Hamilton, Shouli Yan, T. R. Viswanathan:
An uncalibrated 2MHz, 6mW, 63.5dB SNDR discrete-time input VCO-based ΔΣ ADC. CICC 2012: 1-4 - 2010
- [j9]Joseph Hamilton, Shouli Yan, T. R. Viswanathan:
A Discrete-Time Input Delta Sigma ADC Architecture Using a Dual-VCO-Based Integrator. IEEE Trans. Circuits Syst. II Express Briefs 57-II(11): 848-852 (2010)
2000 – 2009
- 2009
- [j8]Zhiheng Cao, Shouli Yan, Yunchu Li:
A 32 mW 1.25 GS/s 6b 2b/Step SAR ADC in 0.13 µm CMOS. IEEE J. Solid State Circuits 44(3): 862-873 (2009) - 2008
- [j7]Tongyu Song, Zhiheng Cao, Shouli Yan:
A 2.7-mW 2-MHz Continuous-Time ΣΔ Modulator With a Hybrid Active-Passive Loop Filter. IEEE J. Solid State Circuits 43(2): 330-341 (2008) - [j6]Zhiheng Cao, Yunchu Li, Shouli Yan:
A 0.4 ps-RMS-Jitter 1-3 GHz Ring-Oscillator PLL Using Phase-Noise Preamplification. IEEE J. Solid State Circuits 43(9): 2079-2089 (2008) - [j5]Tongyu Song, Jingyu Hu, Xiaohong Li, Edgar Sánchez-Sinencio, Shouli Yan:
A Robust and Scalable Constant- gm Rail-to-Rail CMOS Input Stage With Dynamic Feedback for VLSI Cell Libraries. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 804-816 (2008) - [c17]Zhiheng Cao, Shouli Yan:
A 52mW 10b 210MS/s two-step ADC for digital-IF receivers in 0.13μm CMOS. CICC 2008: 309-312 - [c16]Zhiheng Cao, Shouli Yan, Yunchu Li:
A 32mW 1.25GS/s 6b 2b/step SAR ADC in 0.13μm CMOS. ISSCC 2008: 542-543 - 2007
- [j4]Zhiheng Cao, Tongyu Song, Shouli Yan:
A 14 mW 2.5 MS/s 14 bit ΣΔ Modulator Using Split-Path Pseudo-Differential Amplifiers. IEEE J. Solid State Circuits 42(10): 2169-2179 (2007) - [j3]Tongyu Song, Jingyu Hu, Xiaohong Li, Shouli Yan:
A Constant- gm Constant-Slew-Rate Rail-to-Rail Input Stage With Static Feedback and Dynamic Current Steering for VLSI Cell Libraries. IEEE Trans. Circuits Syst. II Express Briefs 54-II(1): 76-80 (2007) - [c15]Tongyu Song, Shouli Yan:
A Robust Rail-to-Rail Input Stage with Constant-gm and Constant Slew Rate Using a Novel Level Shifter. ISCAS 2007: 477-480 - 2006
- [c14]Zhiheng Cao, Tongyu Song, Shouli Yan:
A 14mW 2.5MS/s 14bit Sigma-Delta Modulator Using Pseudo-Differential Split-Path Cascode Amplifiers. CICC 2006: 49-52 - [c13]Tongyu Song, Zhiheng Cao, Shouli Yan:
A 2.7mW 2MHz Continuous-Time ΣΔ Modulator with a Hybrid Active-Passive Loop Filter. CICC 2006: 57-60 - [c12]Tongyu Song, Shouli Yan:
A low power 1.1 MHz CMOS continuous-time delta-sigma modulator with active-passive loop filters. ISCAS 2006 - [c11]Gonggui Xu, Shouli Yan:
An improved frequency and phase synthesis architecture. ISCAS 2006 - 2005
- [c10]Byung Geun Lee, Shouli Yan:
A new ratio-independent A/D conversion technique for high-resolution pipeline A/D converters. ISCAS (3) 2005: 1960-1963 - [c9]Shouli Yan, Jingyu Hu, Tongyu Song:
Novel and robust constant-gm technique for rail-to-rail CMOS amplifier input stages. ISCAS (3) 2005: 2563-2566 - [c8]Shouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio:
A constant-gm rail-to-rail op amp input stage using dynamic current scaling technique. ISCAS (3) 2005: 2567-2570 - [c7]Shouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio:
Constant-gm techniques for rail-to-rail CMOS amplifier input stages: a comparative study. ISCAS (3) 2005: 2571-2574 - [c6]Feng Zhu, Shouli Yan, Jingyu Hu, Edgar Sánchez-Sinencio:
Feedforward reversed nested Miller compensation techniques for three-stage amplifiers. ISCAS (3) 2005: 2575-2578 - [c5]Zhiheng Cao, Shouli Yan:
A digital background calibration method for mash Σ-Δ modulators by using coefficient estimation. ISCAS (4) 2005: 3091-3094 - 2004
- [j2]Shouli Yan, Edgar Sánchez-Sinencio:
A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth. IEEE J. Solid State Circuits 39(1): 75-86 (2004) - [j1]Bo Xia, Shouli Yan, Edgar Sánchez-Sinencio:
An RC time constant auto-tuning structure for high linearity continuous-time ΣΔ modulators and active filters. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(11): 2179-2188 (2004) - [c4]Jianhua Gan, Shouli Yan, Jacob A. Abraham:
Effects of noise and nonlinearity on the calibration of a non-binary capacitor array in a successive approximation analog-to-digital converter. ASP-DAC 2004: 292-297 - 2003
- [c3]Jianhua Gan, Shouli Yan, Jacob A. Abraham:
Design and modeling of a 16-bit 1.5MSPS successive approximation ADC with non-binary capacitor array. ACM Great Lakes Symposium on VLSI 2003: 161-164 - 2002
- [c2]Bo Xia, Shouli Yan, Edgar Sánchez-Sinencio:
An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters. ISCAS (5) 2002: 593-596 - 2000
- [c1]Shouli Yan, Edgar Sánchez-Sinencio:
A programmable rail-to-rail constant-gm input structure for LV amplifier. ISCAS 2000: 645-648
Coauthor Index
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