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Honglong Li
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2020 – today
- 2023
- [j3]Mengmeng Xu
, Zhongxing Zhang
Hierarchical Parallel Vision Processor for High-Speed Ship Detection. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1164-1168 (2023) - 2022
- [j2]Xuemin Zheng
ViP: A Hierarchical Parallel Vision Processor for Hybrid Vision Chip. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2957-2961 (2022)
2010 – 2019
- 2019
- [j1]Qian Di, Zhongxing Zhang, Honglong Li, Zhao Zhang, Peng Feng, Nanjian Wu:
Single event upset failure probability evaluation and periodic scrubbing techniques for hierarchical parallel vision processors. IEICE Electron. Express 16(21): 20190544 (2019) - 2015
- [c2]Honglong Li, Zhongxing Zhang, Jie Yang, Liyuan Liu, Nanjian Wu:
A novel vision chip architecture for image recognition based on convolutional neural network. ASICON 2015: 1-4 - [c1]Zhongxing Zhang, Jie Yang, Honglong Li, Liyuan Liu, Jian Liu, Nanjian Wu:
High-speed object detection based on a hierarchical parallel vision chip. ASICON 2015: 1-4
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last updated on 2024-08-10 00:32 CEST by the dblp team
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