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Niansong Zhang
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2020 – today
- 2024
- [j5]Courtney Golden
, Dan Ilan
Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator. IEEE Comput. Archit. Lett. 23(1): 29-32 (2024) - [j4]Hongzheng Chen
Allo: A Programming Model for Composable Accelerator Design. Proc. ACM Program. Lang. 8(PLDI): 593-620 (2024) - [c11]Louis-Noël Pouchet
Formal Verification of Source-to-Source Transformations for HLS. FPGA 2024: 97-107 - [c10]Hongzheng Chen
A Comprehensive Evaluation of FPGA-Based Spatial Acceleration of LLMs. FPGA 2024: 185 - [i5]Hongzheng Chen
Allo: A Programming Model for Composable Accelerator Design. CoRR abs/2404.04815 (2024) - 2023
- [j3]Shulin Zeng
Serving Multi-DNN Workloads on FPGAs: A Coordinated Architecture, Scheduling, and Mapping Perspective. IEEE Trans. Computers 72(5): 1314-1328 (2023) - [i4]Hongzheng Chen
Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inference. CoRR abs/2312.15159 (2023) - 2022
- [j2]Niansong Zhang
RapidLayout: Fast Hard Block Placement of FPGA-optimized Systolic Arrays Using Evolutionary Algorithm. ACM Trans. Reconfigurable Technol. Syst. 15(4): 38:1-38:23 (2022) - [c9]Tianchen Zhao, Niansong Zhang, Xuefei Ning, He Wang, Li Yi, Yu Wang:
CodedVTR: Codebook-based Sparse Voxel Transformer with Geometric Guidance. CVPR 2022: 1425-1434 - [c8]Debjit Pal, Yi-Hsiang Lai, Shaojie Xiang, Niansong Zhang
Accelerator design with decoupled hardware customizations: benefits and challenges: invited. DAC 2022: 1351-1354 - [c7]Shaojie Xiang, Yi-Hsiang Lai, Yuan Zhou, Hongzheng Chen
HeteroFlow: An Accelerator Programming Model with Decoupled Data Placement for Software-Defined FPGAs. FPGA 2022: 78-88 - [i3]Tianchen Zhao, Niansong Zhang, Xuefei Ning, He Wang, Li Yi, Yu Wang:
CodedVTR: Codebook-based Sparse Voxel Transformer with Geometric Guidance. CoRR abs/2203.09887 (2022) - 2021
- [c6]Zhen Qi, Zhenzhong Yang, Jianying Zhao, Niansong Zhang:
Research on Related Technology of Intelligent Robot Space Datum Determination of Complex Structure Blank Parts. EITCE 2021: 809-814 - 2020
- [c5]Niansong Zhang
RapidLayout: Fast Hard Block Placement of FPGA-Optimized Systolic Arrays using Evolutionary Algorithms. FPL 2020: 145-152 - [c4]Wenchi Du, Niansong Zhang, Aimin Wang:
Safety Production Process Hazard Situation Analysis System Based on Large-scale Data Real-time Processing. ICSIM 2020: 36-40 - [i2]Niansong Zhang, Xiang Chen, Nachiket Kapre:
RapidLayout: Fast Hard Block Placement of FPGA-optimized Systolic Arrays using Evolutionary Algorithms. CoRR abs/2002.06998 (2020) - [i1]Xuefei Ning, Changcheng Tang, Wenshuo Li, Songyi Yang, Tianchen Zhao, Niansong Zhang, Tianyi Lu, Shuang Liang, Huazhong Yang, Yu Wang:
aw_nas: A Modularized and Extensible NAS framework. CoRR abs/2012.10388 (2020)
2010 – 2019
- 2019
- [c3]Qin Li, Niansong Zhang, Aimin Wang:
Method for Optimal Allocation of Margin Based on Normal Registration. ICIBE 2019: 287-290 - [c2]Shoujie Duan, Niansong Zhang, Aiming Wang:
Method for Identifying Arc Length of TIG Welding Based on Machine Vision and Image Processing. ICVISP 2019: 88:1-88:5 - 2018
- [j1]Yixiang Liu, Xizhe Zang, Niansong Zhang, Yubin Liu:
Kinetic Responses to Unilateral Constraint of the Metatarsophalangeal Joints During Bipedal Walking. Int. J. Humanoid Robotics 15(5): 1850018:1-1850018:16 (2018) - [c1]Yixiang Liu, Xizhe Zang, Niansong Zhang, Ming Wu
Gait Symmetry Can Reduce Dependence on the Intact Limb during Walking with Constraint of Unilateral Metatarsophalangeal Joints. EMBC 2018: 2300-2303
Coauthor Index
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last updated on 2024-10-30 20:31 CET by the dblp team
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