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C. Patrick Yue
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2020 – today
- 2024
- [j36]Derek Abbott, Sonia Aissa, Anuradha Annaswamy, Nirwan Ansari, Jun Cai, Kun-Shan Chen, Yixin Chen, J.-C. Chiao, Ayman El-Baz, Shaikh Fattah, Hoay Gooi, Maya B. Gokhale, Chih-Lin I, Giuseppe Iannaccone, Yumi Iwashita, Bruce Jacob, Abbas Jamalipour, Bahram Javidi, Weihua Jiang, Okyay Kaynak, Hulya Kirkici, Germano Lambert-Torres, Shengtao Li, Michal Mrozowski, Michele Nappi, Dalma Novak, Hugo Proença, Yi Qian, Zhihua Qu, Susanto Rahardja, Mehrdad Saif, Ali Serpengüzel, Peter H. Siegel, Ashitey Trebi-Ollennu, Daniela Tuninetti, Ge Wang, Keith A. Wear, Andreas Weisshaar, C. Patrick Yue, Enrico Zio:
Editor-in-Chief. IEEE Access 12: i-xi (2024) - [j35]Li Wang
, Zhao Zhang
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. IEEE J. Solid State Circuits 59(2): 449-463 (2024) - [j34]Ziyang Hong, C. Patrick Yue:
Real-Time 3D Visual Perception by Cross-Dimensional Refined Learning. IEEE Trans. Circuits Syst. Video Technol. 34(10): 10326-10338 (2024) - [c64]Fuzhan Chen
A 56-Gbaud 7.3-Vppd Linear Modulator Transmitter with AMUX-Based Reconfigurable FFE and Dynamic Triple-Stacked Driver in 130-nm SiGe BiCMOS. CICC 2024: 1-2 - [c63]Li Wang
A 20-24-GHz DPSSPLL with Charge-Domain Bandwidth Optimization Scheme Achieving 61.3-fs RMS Jitter and -253-dB FoMJitter. CICC 2024: 1-2 - [c62]Chongyun Zhang, Li Wang, Zilu Liu, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue:
A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm2 area in 28-nm CMOS. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j33]Junmin Jiang
A Fully-Integrated Micro-Display System With Hybrid Voltage Regulator. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(2): 605-616 (2023) - [j32]Xianbo Li
Dual-Photodiode Differential Receivers Achieving Double Photodetection Area for Gigabit-Per-Second Optical Wireless Communication. IEEE J. Solid State Circuits 58(6): 1681-1692 (2023) - [j31]Chengchao Bai
Adaptive Hybrid Optimization Learning-Based Accurate Motion Planning of Multi-Joint Arm. IEEE Trans. Neural Networks Learn. Syst. 34(9): 5440-5451 (2023) - [c61]Johar Abdekhoda, Li Wang
A Bang-Bang Phase Detector for PAM-N Signaling. ASICON 2023: 1-4 - [c60]Zilu Liu, Li Wang
Design of Chip-to-PCB Matching Network for Millimeter-Wave On-Chip Transmitter and On-PCB Antenna. ASICON 2023: 1-4 - [c59]Hoi Chuen Cheng, Ling Shi, C. Patrick Yue:
Optimizing Field-of-View for Multi-Agent Path Finding via Reinforcement Learning: A Performance and Communication Overhead Study. CDC 2023: 2141-2146 - [c58]Fuzhan Chen
A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. ESSCIRC 2023: 373-376 - [c57]Ziyang Hong, C. Patrick Yue:
Cross-Dimensional Refined Learning for Real-Time 3D Visual Perception from Monocular Video. ICCV (Workshops) 2023: 2161-2170 - [c56]Li Wang
A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and -248.6-dB FoMjitter. VLSI Technology and Circuits 2023: 1-2 - [i3]Ziyang Hong, C. Patrick Yue:
Cross-Dimensional Refined Learning for Real-Time 3D Visual Perception from Monocular Video. CoRR abs/2303.09248 (2023) - 2022
- [j30]Babar Hussain
LiDR: Visible-Light-Communication-Assisted Dead Reckoning for Accurate Indoor Localization. IEEE Internet Things J. 9(17): 15742-15755 (2022) - [j29]Yiru Wang
VLP Landmark and SLAM-Assisted Automatic Map Calibration for Robot Navigation with Semantic Information. Robotics 11(4): 84 (2022) - [j28]Bo Xu
Smart Home Control System Using VLC and Bluetooth Enabled AC Light Bulb for 3D Indoor Localization with Centimeter-Level Precision. Sensors 22(21): 8181 (2022) - [j27]Ziyang Hong
Efficient-Grad: Efficient Training Deep Convolutional Neural Networks on Edge Devices with Gradient Optimizations. ACM Trans. Embed. Comput. Syst. 21(2): 19:1-19:24 (2022) - [j26]Babar Hussain
Camera Pose Estimation Using a VLC-Modulated Single Rectangular LED for Indoor Positioning. IEEE Trans. Instrum. Meas. 71: 1-11 (2022) - [c55]Chongyun Zhang
A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS. MWSCAS 2022: 1-4 - 2021
- [j25]Milad Kalantari
A W-Band Single-Antenna FMCW Radar Transceiver With Adaptive Leakage Cancellation. IEEE J. Solid State Circuits 56(6): 1655-1667 (2021) - [j24]Zhao Zhang
A 0.25-0.4-V, Sub-0.11-mW/GHz, 0.15-1.6-GHz PLL Using an Offset Dual-Path Architecture With Dynamic Charge Pumps. IEEE J. Solid State Circuits 56(6): 1871-1885 (2021) - [j23]Can Wang
A 52-Gb/s Sub-1-pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects. IEEE Open J. Circuits Syst. 2: 46-55 (2021) - [j22]Rehan Azmat
Sensing and Cancellation Circuits for Mitigating EMI-Related Common Mode Noise in High-Speed PAM-4 Transmitter. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4545-4555 (2021) - [j21]Weimin Shi
Design and Analysis of Continuous-Mode Doherty Power Amplifier With Second Harmonic Control. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2247-2251 (2021) - [c54]Fuzhan Chen
Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine. ASICON 2021: 1-4 - [c53]Zilu Liu, Rehan Azmat, Xinyi Liu, Li Wang
On-Chip Filter for Mitigating EMI-Related Common-Mode Noise in High-Speed PAM-4 Transmitter. ASICON 2021: 1-4 - [c52]Tianxin Min, Jian Kang, Bo Xu, Weimin Shi, C. Patrick Yue:
Design and Verification of a 334-Mb/s DCO-OFDM Li-Fi Transceiver Using Integrated System Evaluation Engine. ASICON 2021: 1-4 - [c51]Weimin Shi, Fuzhan Chen, Xinyi Liu, Chongyun Zhang, Zilu Liu, Tianxin Min, Bo Xu, Li Wang
An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs. ASICON 2021: 1-4 - [c50]Bo Xu, Babar Hussain, Xinyi Liu, Tianxin Min, Hoi Chuen Cheng, C. Patrick Yue:
Smart-Home Control System Using VLC-Enabled High-Power LED Lightbulb. GCCE 2021: 744-745 - [c49]Yiru Wang, Weipeng Guan, Babar Hussain, C. Patrick Yue:
High Precision Indoor Robot Localization Using VLC Enabled Smart Lighting. OFC 2021: 1-3 - [c48]Yiru Wang, C. Patrick Yue:
Orthogonally Interweaved Data Encryption Method for Screen to Camera Communication. PCS 2021: 1-5 - [c47]Li Wang, Zhao Zhang, C. Patrick Yue:
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a -8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery. VLSI Circuits 2021: 1-2 - [i2]Ziyang Hong, C. Patrick Yue:
Efficient Training Convolutional Neural Networks on Edge Devices with Gradient-pruned Sign-symmetric Feedback Alignment. CoRR abs/2103.02889 (2021) - [i1]Weipeng Guan, Babar Hussain, C. Patrick Yue:
Technology Report : Robotic Localization and Navigation System for Visible Light Positioning and SLAM. CoRR abs/2104.14755 (2021) - 2020
- [j20]Zhao Zhang
A 0.65-V 12-16-GHz Sub-Sampling PLL With 56.4-fsrms Integrated Jitter and -256.4-dB FoM. IEEE J. Solid State Circuits 55(6): 1665-1683 (2020) - [j19]Zhao Zhang
A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator. IEEE J. Solid State Circuits 55(10): 2734-2746 (2020) - [j18]Quan Pan
A 42-dB Ω 25-Gb/s CMOS Transimpedance Amplifier With Multiple-Peaking Scheme for Optical Communications. IEEE Trans. Circuits Syst. II Express Briefs 67-II(1): 72-76 (2020) - [j17]Xiangyu Meng
A 28-GHz 16-Gb/s High Efficiency 16-QAM Transmitter in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 1835-1845 (2020) - [j16]Quan Pan
A Low-Power PAM4 Receiver With an Adaptive Variable-Gain Rectifier-Based Decoder. IEEE Trans. Very Large Scale Integr. Syst. 28(10): 2099-2108 (2020) - [c46]Milad Kalantari, Hossein Shirinabadi, Ali Fotowat-Ahmadi, C. Patrick Yue:
4.7 A Single-Antenna W-Band FMCW Radar Front-End Utilizing Adaptive Leakage Cancellation. ISSCC 2020: 88-90 - [c45]Bo Xu, Li Wang
An RGB-LED Driver with Feed-Forward Equalization Used for PAM-4 Visible Light Communication. MLICOM 2020: 228-234 - [c44]Yiru Wang, Bo Xu, Jian Kang, Cong Qiu, C. Patrick Yue:
Performance Analysis and Evaluation of Outdoor Visible Light Communication Reception. MLICOM 2020: 235-241 - [c43]Jian Kang, Xuanzheng Wang, Li Wang
A Real-Time RGB PAM-4 Visible Light Communication System Based on a Transceiver Design with Pre- and Post-equalizations. MLICOM 2020: 265-270
2010 – 2019
- 2019
- [c42]Xiangyu Meng, Zhenpeng Zheng, Jiaqi Zhang, C. Patrick Yue:
A 28-GHz Compact SPDT Switch Using LC-Based Spiral Transmission Lines in 65-nm CMOS. A-SSCC 2019: 79-80 - [c41]Zhao Zhang, Guang Zhu, Can Wang, Li Wang
A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator. A-SSCC 2019: 241-242 - [c40]Babar Hussain, Cong Qiu, C. Patrick Yue:
Smart Lighting Control and Services Using Visible Light Communication and Bluetooth. GCCE 2019: 1-2 - [c39]Jian Kang, Li Wang
Design of a Real-Time Visible Laser Light Communication System with Basedband in FPGA for High Definition video Transmission. GCCE 2019: 179-180 - [c38]Bo Xu, Zhaojun Liu, C. Patrick Yue:
An AC-Powered Smart LED Bulb for 3D Indoor Localization Using VLC. GCCE 2019: 236-237 - [c37]Cong Qiu, Babar Hussain, C. Patrick Yue:
Bluetooth Based Wireless Control for iBeacon and VLC Enabled Lighting. GCCE 2019: 614-615 - [c36]Babar Hussain, Cong Qiu, C. Patrick Yue:
A Universal VLC Modulator for Retrofitting LED Lighting and Signage. GCCE 2019: 1008-1009 - [c35]Zhao Zhang, Guang Zhu, C. Patrick Yue:
A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoM. ISSCC 2019: 488-490 - [c34]Zhao Zhang, Guang Zhu, C. Patrick Yue:
A 0.25-0.4V, Sub-0.11mW/GHz, 0.15-1.6GHz PLL Using an Offset Dual-Path Loop Architecture with Dynamic Charge Pumps. VLSI Circuits 2019: 158- - [c33]Can Wang
A 52-Gb/s Sub-1pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects. VLSI Circuits 2019: 274- - 2018
- [j15]Khawaja Qasim Maqbool
EMI-Related Common-Mode (CM) Noise Analysis and Prediction of High-Speed Source-Series Terminated (SST) I/O Driver in System-on-Package (SOP). IEEE Trans. Circuits Syst. II Express Briefs 65-II(4): 446-450 (2018) - [j14]Haikun Jia
A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2657-2668 (2018) - [c32]Xiangyu Meng, Can Wang
A 16-GB/S 0-DB Power Back-Off 16-QAM Transmitter at 28 GHZ in 65-NM CMOS. VLSI Circuits 2018: 217-218 - 2017
- [j13]Yipeng Wang
A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(3): 653-663 (2017) - [c31]Guang Zhu, Quan Pan, John Zhuang, Charlie Zhi, C. Patrick Yue:
A low-power PAM4 receiver using 1/4-rate sampling decoder with adaptive variable-gain rectification. A-SSCC 2017: 81-84 - [c30]Junmin Jiang
Fully-integrated AMLED micro display system with a hybrid voltage regulator. A-SSCC 2017: 277-280 - [c29]Khawaja Qasim Maqbool
EMI common-mode (CM) noise suppression from self-calibration of high-speed SST driver using on-chip process monitoring circuit. ISCAS 2017: 1-4 - 2016
- [c28]Haikun Jia, Clarissa C. Prawoto
A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators. A-SSCC 2016: 345-348 - [e1]Xia Zhou, C. Patrick Yue:
Proceedings of the 3rd Workshop on Visible Light Communication Systems, VLCS@MobiCom 2016, New York City, NY, USA, October 3-7, 2016. ACM 2016, ISBN 978-1-4503-4253-7 [contents] - 2015
- [j12]Yan Lu
A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 707-716 (2015) - [c27]Yipeng Wang, Duona Luo
A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks. ESSCIRC 2015: 152-155 - [c26]Yan Lu
20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors. ISSCC 2015: 1-3 - [c25]Babar Hussain
A fully integrated IEEE 802.15.7 visible light communication transmitter with on-chip 8-W 85% efficiency boost LED driver. VLSIC 2015: 216- - [c24]Liang Wu, Xianbo Li
An AMLED microdisplay driver SoC with built-in 1.25-Mb/s VLC transmitter. VLSIC 2015: 328- - 2014
- [j11]X. Shawn Wang, Xin Wang, Fei Lu, Chen Zhang, Zongyu Dong, Li Wang, Rui Ma, Zitao Shi, Albert Z. Wang, Mau-Chung Frank Chang
Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. IEEE J. Solid State Circuits 49(9): 1927-1941 (2014) - [j10]Li Sun, Quan Pan, Keh-Chung Wang, C. Patrick Yue
A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2139-2149 (2014) - [c23]Quan Pan, Yipeng Wang, Zhengxiong Hou, Li Sun, Liang Wu, Wing-Hung Ki
A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization. ESSCIRC 2014: 127-130 - [c22]Ming Liu
Towards indoor localization using Visible Light Communication for consumer electronic devices. IROS 2014: 143-148 - [c21]Yan Lu
17.11 A 0.65ns-response-time 3.01ps FOM fully-integrated low-dropout regulator with full-spectrum power-supply-rejection for wideband communication systems. ISSCC 2014: 306-307 - [c20]Quan Pan, Zhengxiong Hou, Yipeng Wang, Yan Lu
A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer. VLSIC 2014: 1-2 - 2013
- [j9]Yan Lu
A ±0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications. IEEE Trans. Circuits Syst. II Express Briefs 60-II(10): 642-646 (2013) - [c19]Zhengxiong Hou, Yipeng Wang, Quan Pan, C. Patrick Yue
A 25-Gb/s 32.1-dB CMOS limiting amplifier for integrated optical receivers. ASICON 2013: 1-4 - [c18]Quan Pan, Zhengxiong Hou, Yipeng Wang, C. Patrick Yue
A 65-nm CMOS P-well/Deep N-well avalanche photodetector for integrated 850-nm optical. ASICON 2013: 1-4 - [c17]X. Shawn Wang, Xin Wang, Fei Lu, Li Wang, Rui Ma, Zongyu Dong, Li Sun, Albert Z. Wang, C. Patrick Yue
A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design. CICC 2013: 1-4 - [c16]Yan Lu
A 13.56MHz fully integrated 1X/2X active rectifier with compensated bias current for inductively powered devices. ISSCC 2013: 66-67 - 2012
- [c15]Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian
A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC 2012: 1-4 - [c14]Yan Lu
Input-adaptive dual-output power management unit for energy harvesting devices. MWSCAS 2012: 1080-1083 - [c13]Michel Brillouët, Shyh-Jye Jou, C. Patrick Yue:
Welcome from the general chairs. VLSI-DAT 2012: 1 - [c12]Ping K. Ko, C. Patrick Yue
The evolution of fabless IC industry in China: Past, present, and future. VLSI-DAT 2012: 1 - [c11]Rongxiang Wu, Salahuddin Raju, Mansun Chan
Wireless power link design using silicon-embedded inductors for brain-machine interface. VLSI-DAT 2012: 1-4
2000 – 2009
- 2009
- [c10]Dong Hun Shin, Ji-Eun Jang, Frank O'Mahony, C. Patrick Yue
A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. CICC 2009: 117-120 - [c9]Munkyo Seo, Basanth Jagannathan, Corrado Carta
A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines. ISSCC 2009: 484-485 - 2008
- [c8]Piljae Park, C. Patrick Yue
Modeling of triple-well isolation and the loading effects on circuits up to 50 GHz. CICC 2008: 217-220 - 2007
- [c7]Jaejin Park, J. F. Liu, L. Richard Carley, C. Patrick Yue
A 1-V, 1.4-2.5 GHz Charge-Pump-Less PLL for a Phase Interpolator Based CDR. CICC 2007: 281-284 - [c6]Dongwoo Hong, Shadi Saberi, Kwang-Ting Cheng, C. Patrick Yue:
A two-tone test method for continuous-time adaptive equalizers. DATE 2007: 1283-1288 - 2005
- [c5]Ruifeng Sun, Jaejin Park, Frank O'Mahony, C. Patrick Yue
A low-power, 20-Gb/s continuous-time adaptive passive equalizer. ISCAS (2) 2005: 920-923 - [c4]Jaejin Park, Ruifeng Sun, L. Rick Carley, C. Patrick Yue
A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs. ISCAS (2) 2005: 1162-1165 - 2004
- [j8]Niranjan A. Talwalkar, C. Patrick Yue
Integrated CMOS transmit-receive switch using LC-tuned substrate bias for 2.4-GHz and 5.2-GHz applications. IEEE J. Solid State Circuits 39(6): 863-870 (2004) - 2003
- [j7]Richard Chang, Niranjan Talwalkar, C. Patrick Yue
Near speed-of-light signaling over on-chip electrical interconnects. IEEE J. Solid State Circuits 38(5): 834-838 (2003) - [j6]Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong:
A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits 38(11): 1813-1820 (2003) - [c3]Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong:
Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC 2003: 682-687 - [c2]S. Simon Wong, C. Patrick Yue
On-Chip Interconnect Inductance - Friend or Foe (Invited). ISQED 2003: 389-394 - 2002
- [j5]Masoud Zargari, David K. Su, C. Patrick Yue
A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems. IEEE J. Solid State Circuits 37(12): 1688-1694 (2002)
1990 – 1999
- 1999
- [c1]C. Patrick Yue, S. Simon Wong:
Design Strategy of On-Chip Inductors for Highly Integrated RF Systems. DAC 1999: 982-987 - [r1]Thomas H. Lee, Maria del Mar Hershenson, Sunderarajan S. Mohan, Kirad Samavati, C. Patrick Yue:
RF Passive IC Components. The VLSI Handbook 1999 - 1998
- [j4]C. Patrick Yue, S. Simon Wong:
On-chip spiral inductors with patterned ground shields for Si-based RF ICs. IEEE J. Solid State Circuits 33(5): 743-752 (1998) - [j3]Derek K. Shaeffer, Arvin Shahani, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Thomas H. Lee:
A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters. IEEE J. Solid State Circuits 33(12): 2219-2231 (1998) - [j2]Arvin Shahani, Derek K. Shaeffer, Sunderarajan S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Mark A. Horowitz, Thomas H. Lee:
Low-power dividerless frequency synthesis using aperture phase detection. IEEE J. Solid State Circuits 33(12): 2232-2239 (1998) - 1993
- [j1]C. Patrick Yue, Victor Martin Agostinelli Jr., Gregory Munson Yeric, A. F. Tasch Jr.:
Improved universal MOSFET electron mobility degradation models for circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1542-1546 (1993)
Coauthor Index
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