default search action
Alessandro Biondi 0001
Person information
- affiliation: Scuola Superiore Sant'Anna, Pisa, Italy
Other persons with the same name
- Alessandro Biondi 0002 — Università di Pisa, Italy
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j38]Federico Nesti, Giulio Rossolini
, Gianluca D'Amico
CARLA-GeAR: A Dataset Generator for a Systematic Evaluation of Adversarial Robustness of Deep Learning Vision Models. IEEE Trans. Intell. Transp. Syst. 25(8): 9840-9851 (2024) - [c66]Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Luca Benini:
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs. DATE 2024: 1-6 - [c65]Gerlando Sciangula, Daniel Casini, Alessandro Biondi, Claudio Scordino:
End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware. DATE 2024: 1-6 - [c64]Francesco Paladino, Alessandro Biondi, Enrico Bini, Paolo Pazzaglia:
Optimizing Per-Core Priorities to Minimize End-To-End Latencies. ECRTS 2024: 6:1-6:25 - [c63]Giulio Rossolini, Alessandro Biondi, Giorgio C. Buttazzo:
Attention-Based Real-Time Defenses for Physical Adversarial Attacks in Vision Applications. ICCPS 2024: 23-32 - [c62]Raffaele Giannessi, Alessandro Biondi, Alessandro Biasci:
RT-Mimalloc: A New Look at Dynamic Memory Allocation for Real-Time Systems. RTAS 2024: 173-185 - 2023
- [j37]Sandro Di Leonardi
Maximizing the Security Level of Real-Time Software While Preserving Temporal Constraints. IEEE Access 11: 35591-35607 (2023) - [j36]Davide Bellassai, Alessandro Biondi, Alessandro Biasci, Bruno Morelli:
Supporting logical execution time in multi-core POSIX systems. J. Syst. Archit. 144: 102987 (2023) - [j35]Fabio Brau
On the Minimal Adversarial Perturbation for Deep Neural Networks With Provable Estimation Error. IEEE Trans. Pattern Anal. Mach. Intell. 45(4): 5038-5052 (2023) - [j34]Edoardo Cittadini
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology. Real Time Syst. 59(4): 609-635 (2023) - [j33]Paolo Pazzaglia
Optimizing Inter-Core Communications Under the LET Paradigm using DMA Engines. IEEE Trans. Computers 72(1): 127-139 (2023) - [j32]Francesco Restuccia
Bounding Memory Access Times in Multi-Accelerator Architectures on FPGA SoCs. IEEE Trans. Computers 72(1): 154-167 (2023) - [j31]Matteo Zini
Analyzing Arm's MPAM From the Perspective of Time Predictability. IEEE Trans. Computers 72(1): 168-182 (2023) - [j30]Federico Nesti
Detecting Adversarial Examples by Input Transformations, Defense Perturbations, and Voting. IEEE Trans. Neural Networks Learn. Syst. 34(3): 1329-1341 (2023) - [j29]Giulio Rossolini
Increasing the Confidence of Deep Neural Networks by Coverage Analysis. IEEE Trans. Software Eng. 49(2): 802-815 (2023) - [c61]Fabio Brau, Giulio Rossolini, Alessandro Biondi, Giorgio C. Buttazzo:
Robust-by-Design Classification via Unitary-Gradient Neural Networks. AAAI 2023: 14729-14737 - [c60]Giulio Rossolini, Federico Nesti, Fabio Brau, Alessandro Biondi, Giorgio C. Buttazzo:
Defending from Physically-Realizable Adversarial Attacks through Internal Over-Activation Analysis. AAAI 2023: 15064-15072 - [c59]Niccolò Borgioli
Real-Time Packet-Based Intrusion Detection on Edge Devices. CPS-IoT Week Workshops 2023: 234-240 - [c58]Gerlando Sciangula, Daniel Casini, Alessandro Biondi
Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications. ECRTS 2023: 9:1-9:26 - [c57]Federico Aromolo, Geoffrey Nelissen, Alessandro Biondi
Replication-Based Scheduling of Parallel Real-Time Tasks. ECRTS 2023: 18:1-18:23 - [c56]Andrea Stevanato, Alessandro Biondi, Alessandro Biasci, Bruno Morelli:
Virtualized DDS Communication for Multi-Domain Systems: Architecture and Performance Evaluation of Design Alternatives. RTAS 2023: 316-328 - [i11]Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs. CoRR abs/2311.09662 (2023) - [i10]Giulio Rossolini, Alessandro Biondi
Attention-Based Real-Time Defenses for Physical Adversarial Attacks in Vision Applications. CoRR abs/2311.11191 (2023) - 2022
- [j28]Federico Aromolo, Alessandro Biondi, Geoffrey Nelissen
Response-Time Analysis for Self-Suspending Tasks Under EDF Scheduling (Artifact). Dagstuhl Artifacts Ser. 8(1): 05:1-05:2 (2022) - [j27]Marco Pagani
A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration. Future Gener. Comput. Syst. 129: 125-140 (2022) - [j26]Daniel Casini
Optimized partitioning and priority assignment of real-time applications on heterogeneous platforms with hardware acceleration. J. Syst. Archit. 124: 102416 (2022) - [j25]Luca Abeni
Partitioning real-time workloads on multi-core virtual machines. J. Syst. Archit. 131: 102733 (2022) - [j24]Francesco Restuccia
ARTe: Providing real-time multitasking to Arduino. J. Syst. Softw. 186: 111185 (2022) - [j23]Matteo Zini
Profiling and controlling I/O-related memory contention in COTS heterogeneous platforms. Softw. Pract. Exp. 52(5): 1095-1113 (2022) - [j22]Niccolò Borgioli
An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4469-4480 (2022) - [c55]Daniel Casini, Alessandro Biondi
Placement of Chains of Real-Time Tasks on Heterogeneous Platforms under EDF Scheduling. DSD 2022: 149-156 - [c54]Gerlando Sciangula, Francesco Restuccia, Alessandro Biondi
Hardware Acceleration of Deep Neural Networks for Autonomous Driving on FPGA-based SoC. DSD 2022: 406-414 - [c53]Federico Aromolo, Alessandro Biondi
Response-Time Analysis for Self-Suspending Tasks Under EDF Scheduling. ECRTS 2022: 13:1-13:18 - [c52]Gabriele Serra
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms. RTAS 2022: 241-253 - [c51]Federico Nesti, Giulio Rossolini, Saasha Nair, Alessandro Biondi
Evaluating the Robustness of Semantic Segmentation for Autonomous Driving against Real-World Adversarial Patch Attacks. WACV 2022: 2826-2835 - [i9]Fabio Brau, Giulio Rossolini, Alessandro Biondi, Giorgio C. Buttazzo:
On the Minimal Adversarial Perturbation for Deep Neural Networks with Provable Estimation Error. CoRR abs/2201.01235 (2022) - [i8]Giulio Rossolini, Federico Nesti, Gianluca D'Amico, Saasha Nair, Alessandro Biondi, Giorgio C. Buttazzo:
On the Real-World Adversarial Robustness of Real-Time Semantic Segmentation Models for Autonomous Driving. CoRR abs/2201.01850 (2022) - [i7]Giulio Rossolini, Federico Nesti, Fabio Brau, Alessandro Biondi
Defending From Physically-Realizable Adversarial Attacks Through Internal Over-Activation Analysis. CoRR abs/2203.07341 (2022) - [i6]Daniel Casini, Paolo Pazzaglia, Alessandro Biondi
Optimized Partitioning and Priority Assignment of Real-Time Applications on Heterogeneous Platforms with Hardware Acceleration. CoRR abs/2205.06773 (2022) - [i5]Federico Nesti, Giulio Rossolini, Gianluca D'Amico, Alessandro Biondi
CARLA-GeAR: a Dataset Generator for a Systematic Evaluation of Adversarial Robustness of Vision Models. CoRR abs/2206.04365 (2022) - [i4]Fabio Brau, Giulio Rossolini, Alessandro Biondi
Robust-by-Design Classification via Unitary-Gradient Neural Networks. CoRR abs/2209.04293 (2022) - 2021
- [j21]Alessandro Biondi, Daniel Casini
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms. IEEE Access 9: 75446-75459 (2021) - [j20]Alessandro Biondi, Angeliki Kritikakou:
Front Matter - ECRTS 2021 Artifacts, Table of Contents, Artifact Evaluation Committee. Dagstuhl Artifacts Ser. 7(1): 00:i-00:x (2021) - [j19]Biruk B. Seyoum
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs. IEEE Trans. Computers 70(11): 1988-2000 (2021) - [j18]Daniel Casini
Task Splitting and Load Balancing of Dynamic Real-Time Workloads for Semi-Partitioned EDF. IEEE Trans. Computers 70(12): 2168-2181 (2021) - [c50]Marco Pacini, Federico Nesti, Alessandro Biondi
X-BaD: A Flexible Tool for Explanation-Based Bias Detection. CSR 2021: 557-562 - [c49]Paolo Pazzaglia, Daniel Casini
Optimal Memory Allocation and Scheduling for DMA Data Transfers under the LET Paradigm. DAC 2021: 1171-1176 - [c48]Pietro Fara, Gabriele Serra
Scheduling Replica Voting in Fixed-Priority Real-Time Systems. ECRTS 2021: 13:1-13:21 - [c47]Federico Aromolo, Alessandro Biondi
Event-Driven Delay-Induced Tasks: Model, Analysis, and Applications. RTAS 2021: 53-65 - [c46]Daniel Casini
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems. RTAS 2021: 306-319 - [c45]Luca Belluardo, Andrea Stevanato, Daniel Casini
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving. RTCSA 2021: 73-82 - [c44]Francesco Restuccia, Alessandro Biondi
Time-Predictable Acceleration of Deep Neural Networks on FPGA SoC Platforms. RTSS 2021: 441-454 - [c43]Biruk B. Seyoum, Marco Pagani, Alessandro Biondi
Automating the design flow under dynamic partial reconfiguration for hardware-software co-design in FPGA SoC. SAC 2021: 481-490 - [i3]Federico Nesti, Alessandro Biondi, Giorgio C. Buttazzo:
Detecting Adversarial Examples by Input Transformations, Defense Perturbations, and Voting. CoRR abs/2101.11466 (2021) - [i2]Giulio Rossolini, Alessandro Biondi, Giorgio Carlo Buttazzo:
Increasing the Confidence of Deep Neural Networks by Coverage Analysis. CoRR abs/2101.12100 (2021) - [i1]Federico Nesti, Giulio Rossolini, Saasha Nair, Alessandro Biondi, Giorgio C. Buttazzo:
Evaluating the Robustness of Semantic Segmentation for Autonomous Driving against Real-World Adversarial Patch Attacks. CoRR abs/2108.06179 (2021) - 2020
- [j17]Alessandro Vittorio Papadopoulos, Alessandro Biondi:
Front Matter, Table of Contents, Preface, Conference Organization. Dagstuhl Artifacts Ser. 6(1): 00:i-00:x (2020) - [j16]Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, Giorgio C. Buttazzo:
Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs (Artifact). Dagstuhl Artifacts Ser. 6(1): 04:1-04:3 (2020) - [j15]Alessandro Biondi
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems. IEEE Embed. Syst. Lett. 12(3): 78-82 (2020) - [j14]Daniel Casini
Timing isolation and improved scheduling of deep neural networks for real-time systems. Softw. Pract. Exp. 50(9): 1760-1777 (2020) - [c42]Daniel Casini
Predictable Memory-CPU Co-Scheduling with Support for Latency-Sensitive Tasks. DAC 2020: 1-6 - [c41]Francesco Restuccia, Alessandro Biondi
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC. DAC 2020: 1-6 - [c40]Francesco Restuccia, Marco Pagani, Alessandro Biondi
Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs. ECRTS 2020: 12:1-12:23 - [c39]Francesco Restuccia, Alessandro Biondi
Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC. FCCM 2020: 129-137 - [c38]Eduardo Quiñones, Sara Royuela, Claudio Scordino
The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization. ISORC 2020: 201-206 - [c37]Daniel Casini
A Holistic Memory Contention Analysis for Parallel Real-Time Tasks under Partitioned Scheduling. RTAS 2020: 239-252 - [c36]Ciro Donnarumma, Alessandro Biondi
Integrating Online Safety-related Memory Tests in Multicore Real-Time Systems. RTSS 2020: 296-307
2010 – 2019
- 2019
- [j13]Luca Abeni
Hierarchical scheduling of real-time tasks over Linux-based virtual machines. J. Syst. Softw. 149: 234-249 (2019) - [j12]Daniel Casini
Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling. IEEE Trans. Computers 68(6): 820-835 (2019) - [j11]Francesco Restuccia, Marco Pagani, Alessandro Biondi
Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs. ACM Trans. Embed. Comput. Syst. 18(5s): 51:1-51:22 (2019) - [j10]Biruk B. Seyoum, Alessandro Biondi
FLORA: FLoorplan Optimizer for Reconfigurable Areas in FPGAs. ACM Trans. Embed. Comput. Syst. 18(5s): 73:1-73:20 (2019) - [c35]Daniel Casini
Analyzing Parallel Real-Time Tasks Implemented with Thread Pools. DAC 2019: 92 - [c34]Paolo Pazzaglia
Simple and General Methods for Fixed-Priority Schedulability in Optimization Problems. DATE 2019: 1543-1548 - [c33]Marco Pagani, Enrico Rossi
A Bandwidth Reservation Mechanism for AXI-Based Hardware Accelerators on FPGAs. ECRTS 2019: 24:1-24:24 - [c32]Lars Bauer, Marvin Damschen
Analyses and architectures for mixed-critical systems: industry trends and research perspective. EMSOFT Companion 2019: 13 - [c31]Giulia Ferri, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo:
Towards the Hypervision of Hardware-based Control Flow Integrity for Arm Platforms. ITASEC 2019 - [c30]Paolo Pazzaglia, Alessandro Biondi
Optimizing the Functional Deployment on Multicore Platforms with Logical Execution Time. RTSS 2019: 207-219 - 2018
- [j9]Paolo Pazzaglia, Luigi Pannocchi, Alessandro Biondi, Marco Di Natale:
Beyond the Weakly Hard Model: Measuring the Performance Cost of Deadline Misses (Artifact). Dagstuhl Artifacts Ser. 4(2): 04:1-04:2 (2018) - [j8]Timo Feld, Alessandro Biondi
A survey of schedulability analysis techniques for rate-dependent tasks. J. Syst. Softw. 138: 100-107 (2018) - [j7]Alessandro Biondi
On the ineffectiveness of 1/m-based interference bounds in the analysis of global EDF and FIFO scheduling. Real Time Syst. 54(3): 515-536 (2018) - [j6]Alessandro Biondi
A design flow for supporting component-based software development in multiprocessor real-time systems. Real Time Syst. 54(4): 800-829 (2018) - [j5]Alessandro Biondi
Response-Time Analysis of Engine Control Applications Under Fixed-Priority Scheduling. IEEE Trans. Computers 67(5): 687-703 (2018) - [j4]Alessandro Biondi
Selecting the Transition Speeds of Engine Control Tasks to Optimize the Performance. ACM Trans. Cyber Phys. Syst. 2(1): 1:1-1:26 (2018) - [j3]Alessandro Biondi
Modeling and Analysis of Engine Control Tasks Under Dynamic Priority Scheduling. IEEE Trans. Ind. Informatics 14(10): 4407-4416 (2018) - [c29]Paolo Pazzaglia
Beyond the Weakly Hard Model: Measuring the Performance Cost of Deadline Misses. ECRTS 2018: 10:1-10:22 - [c28]Giorgiomaria Cicero, Alessandro Biondi
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone. ICIT 2018: 1628-1633 - [c27]Paolo Modica, Alessandro Biondi
Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms. ICIT 2018: 1651-1657 - [c26]Alessandro Biondi
Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm. RTAS 2018: 240-250 - [c25]Daniel Casini
Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures. RTSS 2018: 312-324 - [c24]Geoffrey Nelissen
The SRP Resource Sharing Protocol for Self-Suspending Tasks. RTSS 2018: 361-372 - [c23]Daniel Casini
Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions. RTSS 2018: 421-433 - 2017
- [j2]Mauro Marinoni
Real-Time Analysis and Design of a Dual Protocol Support for Bluetooth LE Devices. IEEE Trans. Ind. Informatics 13(1): 80-91 (2017) - [c22]Alessandro Biondi
Timing-aware FPGA partitioning for real-time applications under dynamic partial reconfiguration. AHS 2017: 172-179 - [c21]Daniel Casini
Semi-Partitioned Scheduling of Dynamic Real-Time Workload: A Practical Approach Based on Analysis-Driven Load Balancing. ECRTS 2017: 13:1-13:23 - [c20]Daniel Casini
Constant bandwidth servers with constrained deadlines. RTNS 2017: 68-77 - [c19]Marco Pagani
A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration. SoCC 2017: 96-101 - 2016
- [j1]Alessandro Biondi
Schedulability Analysis of Hierarchical Real-Time Systems under Shared Resources. IEEE Trans. Computers 65(5): 1593-1605 (2016) - [c18]Alessandro Biondi, Giorgio C. Buttazzo:
Real-time analysis of engine control applications with speed estimation. DATE 2016: 193-198 - [c17]Alessandro Biondi
Lightweight Real-Time Synchronization under P-EDF on Symmetric and Asymmetric Multiprocessors. ECRTS 2016: 39-49 - [c16]Alessandro Biondi
Performance-Driven Design of Engine Control Tasks. ICCPS 2016: 45:1-45:10 - [c15]Vincenzo Apuzzo, Alessandro Biondi
OSEK-Like Kernel Support for Engine Control Applications under EDF Scheduling. RTAS 2016: 13-23 - [c14]Alessandro Biondi
Partitioning and Interface Synthesis in Hierarchical Multiprocessor Real-Time Systems. RTNS 2016: 257-266 - [c13]Alessandro Biondi
A Framework for Supporting Real-Time Applications on Dynamic Reconfigurable FPGAs. RTSS 2016: 1-12 - [c12]Alessandro Biondi
A Blocking Bound for Nested FIFO Spin Locks. RTSS 2016: 291-302 - [c11]Pasquale Buonocunto, Alessandro Biondi
ARTE: arduino real-time extension for programming multitasking applications. SAC 2016: 1724-1731 - 2015
- [c10]Alessandro Biondi, Giorgio C. Buttazzo:
Engine control: task modeling and analysis. DATE 2015: 525-530 - [c9]Alessandro Biondi
Feasibility Analysis of Engine Control Tasks under EDF Scheduling. ECRTS 2015: 139-148 - [c8]Alessandro Biondi
Supporting Component-Based Development in Partitioned Multiprocessor Real-Time Systems. ECRTS 2015: 269-280 - [c7]Alessandro Biondi
Response-time analysis for real-time tasks in engine control applications. ICCPS 2015: 120-129 - [c6]Mauro Marinoni
Dual-protocol support for Bluetooth LE devices. INDIN 2015: 919-922 - [c5]Alessandro Biondi
Resource reservation for real-time self-suspending tasks: theory and practice. RTNS 2015: 97-106 - [c4]Andrea Parri, Alessandro Biondi
Response time analysis for G-EDF and G-DM scheduling of sporadic DAG-tasks with arbitrary deadline. RTNS 2015: 205-214 - 2014
- [c3]Alessandro Biondi
Optimal Design for Reservation Servers under Shared Resources. ECRTS 2014: 153-164 - [c2]Alessandro Biondi
Exact Interference of Adaptive Variable-Rate Tasks under Fixed-Priority Scheduling. ECRTS 2014: 165-174 - [c1]Alessandro Biondi
Hard Constant Bandwidth Server: Comprehensive formulation and critical scenarios. SIES 2014: 29-37
Coauthor Index
Giorgio C. Buttazzo
aka: Giorgio Carlo Buttazzo
aka: Giorgio Carlo Buttazzo
[j38] [c63] [j37] [j35] [j34] [j32] [j30] [j29] [c61] [c60] [c59] [i10] [j27] [j24] [j22] [c54] [c51] [i9] [i8] [i7] [i5] [i4] [j21] [j19] [j18] [c50] [c47] [c46] [c45] [c43] [i3] [i2] [i1] [j16] [j15] [j14] [c42] [c41] [c40] [c39] [c37] [j12] [j11] [j10] [c35] [c33] [c32] [c31] [j8] [j6] [j5] [j4] [j3] [c28] [c27] [c25] [c23] [j2] [c22] [c21] [c20] [c19] [j1] [c18] [c16] [c15] [c14] [c13] [c11] [c10] [c9] [c8] [c7] [c6] [c3] [c2]
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-01 20:47 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: