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Oliver Reiche
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2020 – today
- 2020
- [c15]Bo Qiao, Oliver Reiche, Jürgen Teich, Frank Hannig
:
Unveiling kernel concurrency in multiresolution filters on GPUs with an image processing DSL. GPGPU@PPoPP 2020: 11-20 - [c14]Bo Qiao, Oliver Reiche, M. Akif Özkan
Efficient parallel reduction on GPUs with Hipacc. SCOPES 2020: 58-61
2010 – 2019
- 2019
- [c13]Bo Qiao, Oliver Reiche, Frank Hannig
From Loop Fusion to Kernel Fusion: A Domain-Specific Approach to Locality Optimization. CGO 2019: 242-253 - [d2]Bo Qiao, Oliver Reiche
From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. Zenodo, 2019 - [d1]Bo Qiao, Oliver Reiche
From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. Zenodo, 2019 - 2018
- [b1]Oliver Reiche:
A Domain-Specific Language Approach for Designing and Programming Heterogeneous Image Systems. University of Erlangen-Nuremberg, Germany, Dr. Hut 2018, ISBN 978-3-8439-3726-9, pp. 1-215 - [j5]Oliver Reiche
Loop Parallelization Techniques for FPGA Accelerator Synthesis. J. Signal Process. Syst. 90(1): 3-27 (2018) - [c12]Bo Qiao, Oliver Reiche, Frank Hannig
Automatic Kernel Fusion for Image Processing DSLs. SCOPES 2018: 76-85 - 2017
- [c11]M. Akif Ozkan
Hardware design and analysis of efficient loop coarsening and border handling for image processing. ASAP 2017: 155-163 - [c10]Oliver Reiche, M. Akif Ozkan, Richard Membarth, Jürgen Teich, Frank Hannig
Generating FPGA-based image processing accelerators with Hipacc: (Invited paper). ICCAD 2017: 1026-1033 - [c9]Oliver Reiche
Auto-vectorization for image processing DSLs. LCTES 2017: 21-30 - 2016
- [j4]Richard Membarth, Oliver Reiche
HIPAcc: A Domain-Specific Language and Compiler for Image Processing. IEEE Trans. Parallel Distributed Syst. 27(1): 210-224 (2016) - [c8]Kai Selgrad, Alexander Lier, Jan Dörntlein, Oliver Reiche, Marc Stamminger:
A High-Performance Image Processing DSL for Heterogeneous Architectures. ELS 2016: 39-46 - [c7]M. Akif Ozkan
FPGA-based accelerator design from a domain-specific language. FPL 2016: 1-9 - [c6]Jörg Fickenscher, Oliver Reiche, Jens Schlumberger, Frank Hannig, Jürgen Teich:
Modeling, programming and performance analysis of automotive environment map representations on embedded GPUs. HLDVT 2016: 70-77 - [c5]Konrad Häublein, Marc Reichenbach
Hybrid code description for developing fast and resource efficient image processing architectures. SAMOS 2016: 211-218 - [p1]Moritz Schmid, Oliver Reiche
HIPAcc. FPGAs for Software Programmers 2016: 205-223 - 2015
- [j3]Oliver Reiche
Synthesis and optimization of image processing accelerators using domain knowledge. J. Syst. Archit. 61(10): 646-658 (2015) - [c4]Moritz Schmid, Oliver Reiche
Loop coarsening in C-based High-Level Synthesis. ASAP 2015: 166-173 - [i2]Oliver Reiche, Konrad Häublein, Marc Reichenbach, Frank Hannig
Automatic Optimization of Hardware Accelerators for Image Processing. CoRR abs/1502.07448 (2015) - 2014
- [j2]Richard Membarth, Oliver Reiche
Towards a performance-portable description of geometric multigrid algorithms using a domain-specific language. J. Parallel Distributed Comput. 74(12): 3191-3201 (2014) - [j1]Frank Hannig
Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach. ACM Trans. Embed. Comput. Syst. 13(4s): 133:1-133:29 (2014) - [c3]Oliver Reiche
Code generation from a domain-specific language for C-based HLS of hardware accelerators. CODES+ISSS 2014: 17:1-17:10 - [c2]Richard Membarth, Oliver Reiche, Frank Hannig, Jürgen Teich:
Code generation for embedded heterogeneous architectures on android. DATE 2014: 1-6 - [c1]Oliver Reiche:
Consistent Programming Models and Tools for Designing Heterogeneous Image Systems. Joint Workshop of the German Research Training Groups in Computer Science 2014: 181 - [i1]Moritz Schmid, Oliver Reiche, Christian Schmitt, Frank Hannig, Jürgen Teich:
Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs. CoRR abs/1408.4721 (2014)
Coauthor Index
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