default search action
Alessandro Capotondi
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [c27]Jia-Cheng Hu, Roberto Cavicchioli
, Giulia Berardinelli, Alessandro Capotondi
ShareBERT: Embeddings Are Capable of Learning Hidden Layers. AAAI 2024: 18225-18233 - [c26]Jia-Cheng Hu, Roberto Cavicchioli, Giulia Berardinelli, Alessandro Capotondi:
Learning from Wrong Predictions in Low-Resource Neural Machine Translation. LREC/COLING 2024: 10263-10273 - [c25]Gianluca Brilli, Giacomo Valente, Alessandro Capotondi, Tania Di Mascio, Andrea Marongiu:
Invited Paper: On the Granularity of Bandwidth Regulation in FPGA-Based Heterogeneous Systems on Chip. WCET 2024: 5:1-5:11 - [i14]Jia-Cheng Hu, Roberto Cavicchioli, Alessandro Capotondi:
Bidirectional Awareness Induction in Autoregressive Seq2Seq Models. CoRR abs/2408.13959 (2024) - [i13]Jia-Cheng Hu, Roberto Cavicchioli, Alessandro Capotondi:
Shifted Window Fourier Transform And Retention For Image Captioning. CoRR abs/2408.13963 (2024) - 2023
- [c24]Jia-Cheng Hu, Roberto Cavicchioli, Alessandro Capotondi
Exploiting Multiple Sequence Lengths in Fast End to End Training for Image Captioning. IEEE Big Data 2023: 2173-2182 - [c23]Gianluca Brilli, Giacomo Valente, Alessandro Capotondi
Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCs. DAC 2023: 1-6 - [c22]Luca Valente
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. DATE 2023: 1-6 - [c21]Jia-Cheng Hu
A Request for Clarity over the End of Sequence Token in the Self-Critical Sequence Training. ICIAP (1) 2023: 39-50 - [c20]Jia-Cheng Hu, Roberto Cavicchioli, Giulia Berardinelli, Alessandro Capotondi:
Heterogeneous Encoders Scaling in the Transformer for Neural Machine Translation. NL4AI@AI*IA 2023 - [i12]Jia-Cheng Hu, Roberto Cavicchioli, Alessandro Capotondi:
A request for clarity over the End of Sequence token in the Self-Critical Sequence Training. CoRR abs/2305.12254 (2023) - [i11]Lorenzo Carletti, Gianluca Brilli, Alessandro Capotondi, Paolo Valente, Andrea Marongiu:
The Importance of Worst-Case Memory Contention Analysis for Heterogeneous SoCs. CoRR abs/2309.12864 (2023) - [i10]Jia-Cheng Hu, Roberto Cavicchioli, Giulia Berardinelli, Alessandro Capotondi:
Heterogeneous Encoders Scaling In The Transformer For Neural Machine Translation. CoRR abs/2312.15872 (2023) - 2022
- [c19]Andrea Bernardi, Gianluca Brilli, Alessandro Capotondi
An FPGA Overlay for Efficient Real-Time Localization in 1/10th Scale Autonomous Vehicles. DATE 2022: 915-920 - [c18]Gianluca Brilli, Alessandro Capotondi
Understanding and Mitigating Memory Interference in FPGA-based HeSoCs. DATE 2022: 1335-1340 - [i9]Jia-Cheng Hu
ExpansionNet v2: Block Static Expansion in fast end to end training for Image Captioning. CoRR abs/2208.06551 (2022) - [i8]Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi:
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC. CoRR abs/2211.14944 (2022) - 2021
- [j9]Leonardo Ravaglia
A TinyML Platform for On-Device Continual Learning With Quantized Latent Replays. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(4): 789-802 (2021) - [j8]Miguel de Prado
Robustifying the Deployment of tinyML Models for Autonomous Mini-Vehicles. Sensors 21(4): 1339 (2021) - [c17]Gianluca Bellocchi
A RISC-V-based FPGA Overlay to Simplify Embedded Accelerator Deployment. DSD 2021: 9-17 - [c16]Daniel Madroñal
Unmanned Vehicles in Smart Farming: a Survey and a Glance at Future Horizons. DroneSE/RAPIDO@HiPEAC 2021: 1-8 - [c15]Miguel de Prado, Manuele Rusci, Romain Donze, Alessandro Capotondi
Robustifying the Deployment of tinyML Models for Autonomous Mini-Vehicles. ISCAS 2021: 1-5 - [i7]Leonardo Ravaglia, Manuele Rusci, Davide Nadalini, Alessandro Capotondi, Francesco Conti, Luca Benini:
A TinyML Platform for On-Device Continual Learning with Quantized Latent Replays. CoRR abs/2110.10486 (2021) - 2020
- [j7]Paolo Meloni
Exploring NEURAghe: A Customizable Template for APSoC-Based CNN Inference at the Edge. IEEE Embed. Syst. Lett. 12(2): 62-65 (2020) - [j6]Alessandro Capotondi
CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices. IEEE Trans. Circuits Syst. II Express Briefs 67-II(5): 871-875 (2020) - [c14]Andreas Kurth
Mixed-data-model heterogeneous compilation and OpenMP offloading. CC 2020: 119-131 - [c13]Micaela Verucchi, Gianluca Brilli, Davide Sapienza, Mattia Verasani, Marco Arena, Francesco Gatti, Alessandro Capotondi
A Systematic Assessment of Embedded Neural Networks for Object Detection. ETFA 2020: 937-944 - [c12]Manuele Rusci, Alessandro Capotondi, Luca Benini:
Memory-Driven Mixed Low Precision Quantization for Enabling Deep Network Inference on Microcontrollers. MLSys 2020 - [c11]Manuele Rusci, Marco Fariselli, Alessandro Capotondi
Leveraging Automated Mixed-Low-Precision Quantization for Tiny Edge Microcontrollers. IoT Streams/ITEM@PKDD/ECML 2020: 296-308 - [c10]Leonardo Ravaglia, Manuele Rusci, Alessandro Capotondi
Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node. SiPS 2020: 1-6 - [i6]Miguel de Prado, Romain Donze, Alessandro Capotondi, Manuele Rusci, Serge Monnerat, Luca Benini, Nuria Pazos:
Robust navigation with tinyML for autonomous mini-vehicles. CoRR abs/2007.00302 (2020) - [i5]Leonardo Ravaglia, Manuele Rusci, Alessandro Capotondi, Francesco Conti, Lorenzo Pellegrini, Vincenzo Lomonaco, Davide Maltoni, Luca Benini:
Memory-Latency-Accuracy Trade-offs for Continual Learning on a RISC-V Extreme-Edge Node. CoRR abs/2007.13631 (2020) - [i4]Manuele Rusci, Marco Fariselli, Alessandro Capotondi, Luca Benini:
Leveraging Automated Mixed-Low-Precision Quantization for tiny edge microcontrollers. CoRR abs/2008.05124 (2020)
2010 – 2019
- 2019
- [i3]Manuele Rusci, Alessandro Capotondi, Luca Benini:
Memory-Driven Mixed Low Precision Quantization For Enabling Deep Network Inference On Microcontrollers. CoRR abs/1905.13082 (2019) - 2018
- [j5]Alessandro Capotondi
Runtime Support for Multiple Offload-Based Programming Models on Clustered Manycore Accelerators. IEEE Trans. Emerg. Top. Comput. 6(3): 330-342 (2018) - [j4]Igor Loi
The Quest for Energy-Efficient I$ Design in Ultra-Low-Power Clustered Many-Cores. IEEE Trans. Multi Scale Comput. Syst. 4(2): 99-112 (2018) - [j3]Paolo Meloni
NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN Inference Acceleration on Zynq SoCs. ACM Trans. Reconfigurable Technol. Syst. 11(3): 18:1-18:24 (2018) - [c9]Andreas Kurth
HERO: an open-source research platform for HW/SW exploration of heterogeneous manycore systems. ANDARE@PACT 2018: 5:1-5:6 - [c8]Manuele Rusci, Alessandro Capotondi
Quantized NNs as the definitive solution for inference on low-power ARM MCUs?: work-in-progress. CODES+ISSS 2018: 12 - 2017
- [c7]Alessandro Capotondi
Enabling zero-copy OpenMP offloading on the PULP many-core accelerator. SCOPES 2017: 68-71 - [i2]Paolo Meloni, Alessandro Capotondi, Gianfranco Deriu, Michele Brian, Francesco Conti, Davide Rossi, Luigi Raffo, Luca Benini:
NEURAghe: Exploiting CPU-FPGA Synergies for Efficient and Flexible CNN Inference Acceleration on Zynq SoCs. CoRR abs/1712.00994 (2017) - [i1]Andreas Kurth, Pirmin Vogel, Alessandro Capotondi, Andrea Marongiu, Luca Benini:
HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA. CoRR abs/1712.06497 (2017) - 2016
- [b1]Alessandro Capotondi:
Programming models and tools for many-core platforms ; Modelli e strumenti di programmazione parallela per piattaforme many-core. University of Bologna, Italy, 2016 - [j2]Andrea Marongiu
Controlling NUMA effects in embedded manycore applications with lightweight nested parallelism support. Parallel Comput. 59: 24-42 (2016) - [c6]Alessandro Capotondi
On the effectiveness of OpenMP teams for cluster-based many-core accelerators. HPCS 2016: 667-674 - 2015
- [j1]Andrea Marongiu
Simplifying Many-Core-Based Heterogeneous SoC Programming With Offload Directives. IEEE Trans. Ind. Informatics 11(4): 957-967 (2015) - [c5]Alessandro Capotondi
Runtime Support for Multiple Offload-Based Programming Models on Embedded Manycore Accelerators. COSMIC@CGO 2015: 4:1-4:10 - [c4]Davide Rossi
PULP: A parallel ultra low power platform for next generation IoT applications. Hot Chips Symposium 2015: 1-39 - [c3]Alessandro Capotondi
Enabling Scalable and Fine-Grained Nested Parallelism on Embedded Many-cores. MCSoC 2015: 297-304 - 2014
- [c2]Marco Balboni, Marta Ortín-Obón, Alessandro Capotondi
Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain. NOCS 2014: 72-79 - 2013
- [c1]Andrea Marongiu, Alessandro Capotondi
Improving the programmability of STHORM-based heterogeneous systems with offload-enabled OpenMP. MES 2013: 1-8
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-09-30 00:09 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: