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Katzalin Olcoz
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2020 – today
- 2025
- [j17]John S. Villarrubia, Luis Costero, Francisco D. Igual, Katzalin Olcoz:
Balanced segmentation of CNNs for multi-TPU inference. J. Supercomput. 81(1): 60 (2025) - 2024
- [e3]Jesús Carretero
, Sameer Shende
Euro-Par 2024: Parallel Processing - 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part I. Lecture Notes in Computer Science 14801, Springer 2024, ISBN 978-3-031-69576-6 [contents] - [e2]Jesús Carretero
Euro-Par 2024: Parallel Processing - 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part II. Lecture Notes in Computer Science 14802, Springer 2024, ISBN 978-3-031-69765-4 [contents] - [e1]Jesús Carretero
Euro-Par 2024: Parallel Processing - 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part III. Lecture Notes in Computer Science 14803, Springer 2024, ISBN 978-3-031-69582-7 [contents] - [i7]María José Belda, Katzalin Olcoz, Fernando Castro, Francisco Tirado:
Optimization of a Line Detection Algorithm for Autonomous Vehicles on a RISC-V with Accelerator. CoRR abs/2402.00496 (2024) - [i6]Luis Costero, Francisco D. Igual, Katzalin Olcoz, Francisco Tirado:
Leveraging knowledge-as-a-service (KaaS) for QoS-aware resource management in multi-user video transcoding. CoRR abs/2402.04891 (2024) - [i5]Luis Costero, Francisco D. Igual, Katzalin Olcoz, Francisco Tirado:
Energy efficiency optimization of task-parallel codes on asymmetric architectures. CoRR abs/2402.06319 (2024) - [i4]José L. Risco-Martín, Ignacio-Iker Prado-Rujas, Javier Campoy, María S. Pérez, Katzalin Olcoz:
Advanced simulation-based predictive modelling for solar irradiance sensor farms. CoRR abs/2404.15324 (2024) - 2023
- [j16]Luis Costero
Dynamic power budget redistribution under a power cap on multi-application environments. Sustain. Comput. Informatics Syst. 38: 100865 (2023) - [c20]John S. Villarrubia, Luis Costero, Francisco D. Igual
Improving inference time in multi-TPU systems with profiled model segmentation. PDP 2023: 84-91 - [c19]Javier Campoy, Ignacio-Iker Prado-Rujas, José Luis Risco-Martín, Katzalin Olcoz, María S. Pérez:
Distributed training and inference of deep learning solar energy forecasting models. PDP 2023: 173-176 - [i3]José L. Risco-Martín, Kevin Henares, Saurabh Mittal, Luis F. Almendras, Katzalin Olcoz:
A Unified Cloud-Enabled Discrete Event Parallel and Distributed Simulation Architecture. CoRR abs/2302.11242 (2023) - 2022
- [j15]María José Belda
Optimization of a line detection algorithm for autonomous vehicles on a RISC-V with accelerator. J. Comput. Sci. Technol. 22(2): 10 (2022) - [j14]José L. Risco-Martín
A unified cloud-enabled discrete event parallel and distributed simulation architecture. Simul. Model. Pract. Theory 118: 102539 (2022) - [c18]Pablo Hernández, Luis Costero, Katzalin Olcoz, Francisco D. Igual:
Applying Game-Learning Environments to Power Capping Scenarios via Reinforcement Learning. JCC-BD&ET 2022: 91-106 - 2021
- [j13]Yasir Mahmood Qureshi
Gem5-X: A Many-core Heterogeneous Simulation Platform for Architectural Exploration and Optimization. ACM Trans. Archit. Code Optim. 18(4): 44:1-44:27 (2021) - [j12]Yasir Mahmood Qureshi
Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures. IEEE Trans. Computers 70(12): 2218-2233 (2021) - 2020
- [j11]Luis Costero
Leveraging knowledge-as-a-service (KaaS) for QoS-aware resource management in multi-user video transcoding. J. Supercomput. 76(12): 9388-9403 (2020) - [j10]Luis Costero
Resource Management for Power-Constrained HEVC Transcoding Using Reinforcement Learning. IEEE Trans. Parallel Distributed Syst. 31(12): 2834-2850 (2020)
2010 – 2019
- 2019
- [c17]Luis Costero
MAMUT: Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-User Video Transcoding. DATE 2019: 558-563 - [c16]Iván Prada, Francisco D. Igual, Katzalin Olcoz
Detecting Time-Fragmented Cache Attacks Against AES Using Performance Monitoring Counters. JCC&BD 2019: 3-15 - [c15]Yasir Mahmood Qureshi, William Andrew Simon, Marina Zapater, David Atienza, Katzalin Olcoz
Gem5-X: A Gem5-Based System Level Simulation Framework to Optimize Many-Core Platforms. SpringSim 2019: 1-12 - [c14]Arman Iranfar, Wellington Silva de Souza, Marina Zapater, Katzalin Olcoz
A Machine Learning-Based Framework for Throughput Estimation of Time-Varying Applications in Multi-Core Servers. VLSI-SoC 2019: 211-216 - [c13]Wellington Silva de Souza, Arman Iranfar, Anderson B. N. da Silva, Marina Zapater, Samuel Xavier de Souza
A QoS and Container-Based Approach for Energy Saving and Performance Profiling in Multi-Core Servers. VLSI-SoC 2019: 230-231 - [i2]Iván Prada, Francisco D. Igual, Katzalin Olcoz:
Detecting time-fragmented cache attacks against AES using Performance Monitoring Counters. CoRR abs/1904.11268 (2019) - 2018
- [c12]Yijia Zhang
Level-Spread: A New Job Allocation Policy for Dragonfly Networks. IPDPS 2018: 1123-1132 - 2017
- [j9]Luis Costero
Revisiting conventional task schedulers to exploit asymmetry in multi-core architectures for dense linear algebra operations. Parallel Comput. 68: 59-76 (2017) - [c11]Trishita Tiwari, Ata Turk, Alina Oprea, Katzalin Olcoz
User-profile-based analytics for detecting cloud security breaches. IEEE BigData 2017: 4529-4535 - [c10]Luis Costero, Francisco D. Igual, Katzalin Olcoz, Francisco Tirado:
Energy Efficiency Optimization of Task-Parallel Codes on Asymmetric Architectures. HPCS 2017: 402-409 - 2016
- [c9]Luis Costero
Refactoring Conventional Task Schedulers to Exploit Asymmetric ARM big.LITTLE Architectures in Dense Linear Algebra. IPDPS Workshops 2016: 692-701 - 2015
- [i1]Luis Costero, Francisco D. Igual, Katzalin Olcoz, Enrique S. Quintana-Ortí:
Revisiting Conventional Task Schedulers to Exploit Asymmetry in ARM big.LITTLE Architectures for Dense Linear Algebra. CoRR abs/1509.02058 (2015) - 2014
- [j8]Marina Zapater
A novel energy-driven computing paradigm for e-health scenarios. Future Gener. Comput. Syst. 34: 138-154 (2014) - [j7]José L. Ayala
VLSI for the new era. Integr. 47(3): 295 (2014) - 2012
- [j6]José Manuel Velasco
Memory power optimization of Java-based embedded systems exploiting garbage collection information. J. Syst. Archit. 58(2): 61-72 (2012)
2000 – 2009
- 2009
- [c8]José Manuel Velasco
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems. ACM Great Lakes Symposium on VLSI 2009: 3-8 - 2007
- [c7]José Manuel Velasco, David Atienza, Katzalin Olcoz, Francisco Tirado:
Efficient Object Placement including Node Selection in a Distributed Virtual Machine. PARCO 2007: 509-516 - 2005
- [c6]José Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor:
Performance Evaluation of Barrier Techniques for Distributed Tracing Garbage Collectors. PARCO 2005: 549-556 - [c5]José Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor, Francisco Tirado, Jose Manuel Mendias:
Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems. PATMOS 2005: 69-78 - 2004
- [c4]José Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado
Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded Systems. Interaction between Compilers and Computer Architectures 2004: 25-32 - [c3]José Manuel Velasco
Dynamic Management of Nursery Space Organization in Generational Collection. Interaction between Compilers and Computer Architectures 2004: 33-40 - [c2]José Manuel Velasco, Katzalin Olcoz
Adaptive Tuning of Reserved Space in an Appel Collector. ECOOP 2004: 543-559
1990 – 1999
- 1999
- [j5]Katzalin Olcoz
Unified data path allocation and BIST intrusion. Integr. 28(1): 55-99 (1999) - 1998
- [c1]Katzalin Olcoz
Register Allocation with Simultaneous BIST Intrusio. EUROMICRO 1998: 10099-10106 - 1996
- [j4]Hortensia Mecha
A method for area estimation of data-path in high level synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(2): 258-265 (1996) - 1994
- [j3]Hortensia Mecha
Clock cycle estimation based on dead time and control unit area minimization. Microprocess. Microprogramming 40(10-12): 821-824 (1994) - 1993
- [j2]R. Moreno, Román Hermida
Global hardware synthesis guided by realistic probability computation. Microprocess. Microprogramming 39(2-5): 233-236 (1993) - [j1]Katzalin Olcoz
Data path structures and heuristics for testable allocation in high level synthesis. Microprocess. Microprogramming 39(2-5): 263-266 (1993)
Coauthor Index
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last updated on 2024-10-31 20:16 CET by the dblp team
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