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IET Circuits, Devices & Systems, Volume 12
Volume 12, Number 1, January 2018
- Ahmed Liacha
, Abdelkrim Kamel Oudjida, Farid Ferguene, Mohammed Bakiri
Design of high-speed, low-power, and area-efficient FIR filters. 1-11 - Muyeon Lee, Ickjin Kwon:
3-10 GHz noise-cancelling CMOS LNA using g m -boosting technique. 12-16 - Jin Wu, Youzhi Zhang, Rongqi Zhao, Kunpeng Zhang, Lixia Zheng, Weifeng Sun:
Low-jitter DLL applied for two-segment TDC. 17-24 - Kang-Li Xu
Reduced H 2 optimal models via cross Gramian for continuous linear time-invariant systems. 25-32 - Sumit Verma, Sajad A. Loan, Abdul Rahman M. Alamoud, Abdullah G. Alharbi
Hybrid AlGaN/GaN high-electron mobility transistor: design and simulation. 33-39 - Abdelaziz Hamani, Bruno Allard, Tan-Phu Vuong, Mustapha C. E. Yagoub, Rachida Touhami:
Design of rectenna series-association circuits for radio frequency energy harvesting in CMOS FD-SOI 28 nm. 40-49 - Xiaoping Wang, Ran Yang, Zhigang Zeng, Qiao Chen, Shuangyu Zhu:
Improvement of two-step write scheme in complementary resistive switch array. 50-54 - Pankaj U. Joshi
Self-compensation scheme for truncation error in fixed width multipliers. 55-62 - Lachit Dutta
Direct interfacing circuit-based e-nose for gas classification and its uncertainty estimation. 63-72 - Fabian Khateb
Low-voltage fully differential difference transconductance amplifier. 73-81 - Yong An Li:
RC oscillators based on high-Q frequency-selecting network. 82-87 - Amol Morankar, Rajendra M. Patrikar:
Dual frequency MEMS resonator through mixed electrical and mechanical coupling scheme. 88-93 - Naeem Maroof
Charge sharing write driver and half- V DD pre-charge 8T SRAM with virtual ground for low-power write and read operation. 94-98 - Shamim Sadrafshari
Low-jitter spread spectrum clock generator using charge pump frequency detector in 0.18 μm CMOS for USB3.1 transceivers. 99-107 - Yuanfa Wang, Zunchao Li, Lichen Feng, Hailong Bai, Chuang Wang
Hardware design of multiclass SVM classification for epilepsy and epileptic seizure detection. 108-115 - Chia-Ling Lynn Chang, Charles H.-P. Wen
Accurate performance evaluation of VLSI designs with selected CMOS process parameters. 116-123 - Anush Bekal, Bharathi Mathyarasa, Manish Goswami, Zhou Zhao, Ashok Srivatsava:
Six-bit, reusable comparator stage-based asynchronous binary-search SAR ADC using smart switching network. 124-131
Volume 12, Number 2, March 2018
- Ahmed O. Abdul Salam, Ray E. Sheriff
Multi-taper spectrum-based estimator for cognitive radio using multiple antennas and STBC techniques. 133-143 - Vishwanatha Siddhartha
Systematic circuit design and analysis of a non-ideal DC-DC pulse width modulation boost converter. 144-156 - Rabindranath Nandi, Koushick Mathur, Palaniandavar Venkateswaran:
Quadrature voltage control oscillator with a linear tuning law. 157-163 - Subbiah Durgadevi, Mallapu Gopinath Umamaheswari:
Analysis and design of single phase power factor correction with DC-DC SEPIC Converter for fast dynamic response using genetic algorithm optimised PI controller. 164-174 - Blaise Ravelo:
Theory on negative time-delay looped system. 175-181 - Kan Takeuchi, Masaki Shimada, Takeshi Okagaki, Koji Shibutani, Koji Nii, Fumio Tsuchiya:
Wear-out stress monitor utilising temperature and voltage sensitive ring oscillators. 182-188 - Saman Mohammadi Mohaghegh, Reza Sabbaghi-Nadooshan, Majid Mohammadi:
Innovative model for ternary QCA gates. 189-195 - Madhusmita Panda, Santosh Kumar Patnaik, Ashis Kumar Mal:
Performance enhancement of a VCO using symbolic modelling and optimisation. 196-202 - Fatemeh Shakibaee, Fereshteh Sajedi, Mehdi Saberi:
Low-power successive approximation ADC using split-monotonic capacitive DAC. 203-208 - Bing Xia, Nan Qi
Low-power 2.4 GHz ZigBee transceiver with inductor-less radio-frequency front-end for Internet of things applications. 209-214
Volume 12, Number 3, May 2018
- Slavko Veinovic
Low-power design for DC current transformer using class-D compensating amplifier. 215-220 - Ramya Vijay
Design of penta-band antenna with integrated LNA circuit for vehicular communications. 221-225 - Sean Whitehall, Carlos E. Saavedra
Compact 640 μW frequency-modulated ultra-wideband transmitter. 226-232 - Sanaz Salem, Hamed Zandevakili, Ali Mahani
Fault-tolerant delay cell for ring oscillator application in 65 nm CMOS technology. 233-241 - Alina Caddemi
Light activation of noise at microwave frequencies: a study on scaled gallium arsenide HEMT's. 242-248 - Jagadish Dasarahalli Narasimaiah, Laxminidhi Tonse, Mujoor Sankaranarayana Bhat
11.39 fJ/conversion-step 780 kS/s 8 bit switched capacitor-based area and energy-efficient successive approximation register ADC in 90 nm complementary metal-oxide-semiconductor. 249-255 - Abdul Majeed Kottampara Kuppalath, Binsu J. Kailath
PLL architecture with a composite PFD and variable loop filter. 256-262 - Xiaohong Zhang, Wei Jiang:
Construction of flux-controlled memristor and circuit simulation based on smooth cellular neural networks module. 263-270 - Yao-Lin Jiang, Chun-Yue Chen, Ping Yang:
Balanced truncation with ε-embedding for coupled dynamical systems. 271-279 - Mohammad Saleh Tavazoei:
Passively realisable impedance functions by using two fractional elements and some resistors. 280-285 - Caffey Jindal
Class-AB level shifted flipped voltage follower cell using bulk-driven technique. 286-294 - Rencheng Jin, Jipeng Zhao
Scheme for variable-frequency digital circuit with data compression based on block-match process. 295-300
Volume 12, Number 4, July 2018
- Zhou Zhao, Ashok Srivastava, Lu Peng, Saraju P. Mohanty:
Calibration method to reduce the error in logarithmic conversion with its circuit implementation. 301-308 - Shahzad Hussain, Haris Mehmood
Design and analysis of an ultra-thin crystalline silicon heterostructure solar cell featuring SiGe absorber layer. 309-314 - Sudha Ellison Mathe
Bit-parallel systolic multiplier over GF ( 2 m ) for irreducible trinomials with ASIC and FPGA implementations. 315-325 - Pipat Prommee, Ekkapong Saising:
CMOS-based high-order LP and BP filters using biquad functions. 326-334 - Sean Whitehall, Carlos E. Saavedra
Low-power low data rate FM-UWB receiver front end. 335-340 - Rana Y. El Kashlan
Two-dimensional models for quantum effects on short channel electrostatics of lightly doped symmetric double-gate MOSFETs. 341-346 - Phanumas Khumsat:
Linearisation technique for low-voltage tuneable Nauta's transconductor in Gm - C filter design. 347-361 - Shibendu Mahata, Suman Kumar Saha, Rajib Kar, Durbadal Mandal:
Optimal design of wideband fractional order digital integrator using symbiotic organisms search algorithm. 362-373 - Subhrasmita Panda, Sidhartha Dash, Guru Prasad Mishra:
Analytical modelling of work-function modulated delta-doped TFET to improve analogue performance. 374-381 - Antaryami Panigrahi
1.2 V, 12.5 MHz fourth-order low-pass filter with 83 dB stopband attenuation using low output impedance source follower in 45 nm CMOS. 382-389 - Kimihiro Nanamori, Yusuke Sugihara, Masayoshi Yamamoto:
Oscillation analysis and current peak reduction in paralleled SiC MOSFETs. 390-395 - Montree Kumngern, Thanat Nonthaputha
Low-power sample and hold circuits using current conveyor analogue switches. 397-402 - Daniel Rönnow:
pth-order inverse of the Volterra series for multiple-input multiple-output non-linear dynamic systems. 403-412 - Yashrajsinh Parmar, Krishnamurthy Sridharan:
Precomputation-based radix-4 CORDIC for approximate rotations and Hough transform. 413-423 - Ahmad A. Hiasat:
General modular adder designs for residue number system applications. 424-431 - Jens Spinner, Daniel Rohweder, Jürgen Freudenberger
Soft input decoder for high-rate generalised concatenated codes. 432-438 - Manash Chanda
Design and analysis of a logic model for ultra-low power near threshold adiabatic computing. 439-446 - Min Shi, Yajuan Yu
Window function for fractional-order HP Ti O 2 non-linear memristor model. 447-452 - Swapan Das, Chandan Kumar Sarkar, Sunipa Roy:
Development of integrated microsystem for hydrogen gas detection. 453-459 - Ghasem Pasandi
Internal write-back and read-before-write schemes to eliminate the disturbance to the half-selected cells in SRAMs. 460-466 - Abdullah Yesil
High-order realisation of MOSFET-only band-pass filters for RF applications. 467-477 - Sudhanshu Maheshwari:
Tuning approach for first-order filters and new current-mode circuit example. 478-485 - Kavitha Muppala Kumar
Pulse train controlled quadratic buck converter operating in discontinuous conduction mode. 486-496 - Sonia Salhi, Abdelhalim Slimane, Hammoudi Escid, Sid-Ahmed Tedjini-Bailiche
Design and analysis of CMOS RCG transimpedance amplifier based on elliptic filter approach. 497-504 - Rui Guan, Jianfeng Xue, Chao Yang, Jing Jin, Jianjun Zhou:
16-bit 1-MS/s SAR ADC with foreground digital-domain calibration. 505-513
Volume 12, Number 5, September 2018
- Harikrishna Veldandi
Design procedure for multifinger MOSFET two-stage OTA with shallow trench isolation effect. 513-522 - Babita Jajodia, Anil Mahanta, Shaik Rafi Ahamed:
Mixed-signal demodulator for IEEE 802.15.6 IR-UWB WBAN energy detection-based receiver. 523-531 - Seyed Mahmoud Anisheh, Hossein Shamsi:
Placement and routing method for analogue layout generation using modified cuckoo optimisation algorithm. 532-541 - Mahesh S. Murty, Rahul Shrestha:
Hardware implementation and VLSI design of spectrum sensor for next-generation LTE-A cognitive-radio wireless network. 542-550 - Md. Aref Billaha
Effect of doping on the performance of multiple quantum well infrared photodetector. 551-556 - Pritha Banerjee
Analytical modelling and performance analysis of gate engineered TG silicon-on-nothing metal-oxide-semiconductor field-effect transistor. 557-562 - Elseddik Lamini, Samir Tagzout, Hacène Belbachir, Adel Belouchrani:
Precision analysis with analytical bit-width optimisation process for linear circuits with feedbacks. 563-570 - Mohamed Ali Belaïd
Symptom reliability: S-parameters evaluation of power laterally diffused-metal-oxide-semiconductor field-effect transistor after pulsed-RF life tests for a radar application. 571-578 - Jing Chen, Shukai Duan, Zhekang Dong
Spintronic memristor synapse and its RWC learning algorithm. 579-588 - Kibeom Kim, Jedok Kim, Hongkyun Kim
Rigorous mathematical model of through-silicon via capacitance. 589-593 - Trailokya Nath Sasamal, Ashutosh Kumar Singh
Efficient design of coplanar ripple carry adder in QCA. 594-605 - Mohamed B. Elamien, Soliman A. Mahmoud
An 114 Hz-12 MHz digitally controlled low-pass filter for biomedical and wireless applications. 606-614 - Yen-Sheng Chen, Po-An Liu:
Broadband reconfigurable matching network using a non-uniform transmission line. 615-619 - Hyun-Sik Choi:
Downscaling AsTeGeSiN threshold switching devices for high-density 3D memories. 620-623 - François Gaugaz, François Krummenacher, Maher Kayal:
High-speed analogue sampled-data signal processing for real-time fault location in electrical power networks. 624-629 - Mohammad Reza Nikbakhsh, Ebrahim Abiri, Hossein Ghasemian, Mohammad Reza Salehi:
Two-stage current-reused variable-gain low-noise amplifier for X-band receivers in 65 nm complementary metal oxide semiconductor technology. 630-637 - Gurmohan Singh
Fault-tolerant design and analysis of QCA-based circuits. 638-644 - Seyed Mohamad Taghi Adl
Elastic buffer evaluation for link pipelining under process variation. 645-654 - Stefan Leitner, Haibo Wang:
Digital LDO modelling techniques for performance estimation at early design stage. 655-661 - Jeng-Shyang Pan
Efficient digit-serial modular multiplication algorithm on FPGA. 662-668
Volume 12, Number 6, 2018
- Guest Editorial: Low Voltage Low Power Integrated Circuits and Systems. 669-670
- Jagadish Dasarahalli Narasimaiah, Mujoor Shankaranarayana Bhat
14.5 fJ/conversion-step 9-bit 100-kS/s non-binary weighted dual capacitor array based area and energy efficient SAR ADC in 90 nm CMOS. 671-680 - Sayed Mohammad Ali Zanjani
Inverter-based, low-power and low-voltage, new mixed-mode Gm-C filter in subthreshold CNTFET technology. 681-688 - Marcello De Matteis
Fully-differential flipped-source-follower low-pass analogue filter in CMOS 28 nm bulk. 689-695 - Farooq Ahmad Khanday
0.65 V integrable electronic realisation of integer- and fractional-order Hindmarsh-Rose neuron model using companding technique. 696-706 - Prasanthi Rathnala
Timing error detection and correction for power efficiency: an aggressive scaling approach. 707-712 - Chi-Ray Huang
Single bit-line 8T SRAM cell with asynchronous dual word-line control for bit-interleaved ultra-low voltage operation. 713-719 - Yo-Hao Tu, Jen-Chieh Liu, Kuo-Hsing Cheng, Chi-Yang Chang:
Low supply voltage and multiphase all-digital crystal-less clock generator. 720-725 - Leïla Khanfir
Design optimisation procedure for digital mismatch compensation in latch comparators. 726-734 - Vishwanatha Siddhartha
Low-power non-ideal pulse-width modulated DC-DC buck-boost converter: design, analysis and experimentation. 735-745 - Srinivasan Raghavendran
Supercapacitor charging from piezoelectric energy harvesters using multi-input buck-boost converter. 746-752 - Fei Yuan
Design techniques of all-digital arithmetic units for time-mode signal processing. 753-763 - Ankit Garg
Gate diffusion input based 4-bit Vedic multiplier design. 764-770 - Jian-Dong Wu, Zhuo-Jia Chen, Jun-Sheng Wang, Lei Zhou, Wei-Jing Wu, Miao Xu, Lei Wang, Ruo-He Yao, Jun-Biao Peng:
Manchester-encoded data transmission circuit integrated by metal-oxide TFTs suitable for 13.56 MHz radio-frequency identification tag application. 771-776 - Kasi V. Ramana
Identification of DC-DC buck converter dynamics using relay feedback method with experimental validation. 777-784 - Yu-Chen Wu
Real-time temperature compensation for tunable cavity-based BPFs and BSFs. 785-791 - Mohd. Tasleem Khan, Rafi Ahamed Shaik, Matcha Surya Prakash
Improved convergent distributed arithmetic based low complexity pipelined least-mean-square filter. 792-801 - Subhankar Addya, Sabitabrata Dey, Sanjoy Mandal:
Performance study of optical resonator-based filter architectures. 802-809 - Deepak Kumar Panda
Compact thermal noise model for enhancement mode N-polar GaN MOS-HEMT including 2DEG density solution with two sub-bands. 810-816 - Bhartendu Chaturvedi
Novel CMOS MO-CFDITA based fully electronically controlled square/triangular wave generator with adjustable duty cycle. 817-826
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